niansa-misc/glibc
1
0
Fork 0
mirror of git://sourceware.org/git/glibc.git synced 2025-03-06 20:58:33 +01:00
Code Issues Projects Releases Packages Wiki Activity

AArch64: Optimize memrchr

Browse source 
Optimize the main loop - large strings are 43% faster on modern CPUs.

Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
This commit is contained in:
Wilco Dijkstra 2023-01-11 13:51:17 +00:00
parent ce758d4f06
commit 0077624177
1 changed files with 11 additions and 9 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
sysdeps/aarch64/memrchr.S
View file

@ -26,7 +26,6 @@
* MTE compatible. * MTE compatible.
*/ */
/* Arguments and results. */
#define srcin x0 #define srcin x0
#define chrin w1 #define chrin w1
#define cntin x2 #define cntin x2
@ -77,31 +76,34 @@ ENTRY (__memrchr)
csel result, result, xzr, hi csel result, result, xzr, hi
ret ret
nop
L(start_loop): L(start_loop):
sub tmp, end, src subs cntrem, src, srcin
subs cntrem, cntin, tmp
b.ls L(nomatch) b.ls L(nomatch)
/* Make sure that it won't overread by a 16-byte chunk */ /* Make sure that it won't overread by a 16-byte chunk */
add tmp, cntrem, 15 sub cntrem, cntrem, 1
tbnz tmp, 4, L(loop32_2) tbz cntrem, 4, L(loop32_2)
add src, src, 16
.p2align 4 .p2align 5
L(loop32): L(loop32):
ldr qdata, [src, -16]! ldr qdata, [src, -32]!
cmeq vhas_chr.16b, vdata.16b, vrepchr.16b cmeq vhas_chr.16b, vdata.16b, vrepchr.16b
umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */
fmov synd, dend fmov synd, dend
cbnz synd, L(end) cbnz synd, L(end)
L(loop32_2): L(loop32_2):
ldr qdata, [src, -16]! ldr qdata, [src, -16]
subs cntrem, cntrem, 32 subs cntrem, cntrem, 32
cmeq vhas_chr.16b, vdata.16b, vrepchr.16b cmeq vhas_chr.16b, vdata.16b, vrepchr.16b
b.ls L(end) b.lo L(end_2)
umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */ umaxp vend.16b, vhas_chr.16b, vhas_chr.16b /* 128->64 */
fmov synd, dend fmov synd, dend
cbz synd, L(loop32) cbz synd, L(loop32)
L(end_2):
sub src, src, 16
L(end): L(end):
shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */ shrn vend.8b, vhas_chr.8h, 4 /* 128->64 */
fmov synd, dend fmov synd, dend