niansa-misc/glibc
1
0
Fork 0
mirror of git://sourceware.org/git/glibc.git synced 2025-03-06 20:58:33 +01:00
Code Issues Projects Releases Packages Wiki Activity

aarch64: Improve special-case handling in AdvSIMD double-precision libmvec routines

Browse source 
Avoids emitting many saves/restores of vector registers, reduces the
amount of code generated around the scalar fallback.
This commit is contained in:
Joe Ramsay 2023-11-27 17:02:55 +00:00 • committed by Szabolcs Nagy
parent bc6d79f4ae
commit 7b12776584
1 changed files with 7 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
sysdeps/aarch64/fpu/v_math.h
View file

@ -137,7 +137,13 @@ v_lookup_u64 (const uint64_t *tab, uint64x2_t idx)
static inline float64x2_t static inline float64x2_t
v_call_f64 (double (*f) (double), float64x2_t x, float64x2_t y, uint64x2_t p) v_call_f64 (double (*f) (double), float64x2_t x, float64x2_t y, uint64x2_t p)
{ {
return (float64x2_t){ p[0] ? f (x[0]) : y[0], p[1] ? f (x[1]) : y[1] }; double p1 = p[1];
double x1 = x[1];
if (__glibc_likely (p[0]))
y[0] = f (x[0]);
if (__glibc_likely (p1))
y[1] = f (x1);
return y;
} }
static inline float64x2_t static inline float64x2_t
v_call2_f64 (double (*f) (double, double), float64x2_t x1, float64x2_t x2, v_call2_f64 (double (*f) (double, double), float64x2_t x1, float64x2_t x2,