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494d65129e
In preparation to move the rseq area to the 'extra TLS' block, we need accessors based on the thread pointer and the rseq offset. The ONCE variant of the accessors ensures single-copy atomicity for loads and stores which is required for all fields once the registration is active. A separate header is required to allow including <atomic.h> which results in an include loop when added to <tcb-access.h>. Signed-off-by: Michael Jeanson <mjeanson@efficios.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Reviewed-by: Florian Weimer <fweimer@redhat.com>
98 lines
4.1 KiB
C
98 lines
4.1 KiB
C
/* RSEQ_* accessors. i386 version.
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Copyright (C) 2002-2025 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#define __RSEQ_GETMEM(member) \
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({ __typeof (RSEQ_SELF()->member) __value; \
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if (sizeof (__value) == 1) \
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asm volatile ("movb %%gs:%P2(%3),%b0" \
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: "=q" (__value) \
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: "0" (0), "i" (offsetof (struct rseq_area, member)), \
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"r" (__rseq_offset)); \
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else if (sizeof (__value) == 4) \
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asm volatile ("movl %%gs:%P1(%2),%0" \
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: "=r" (__value) \
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: "i" (offsetof (struct rseq_area, member)), \
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"r" (__rseq_offset)); \
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else /* 8 */ \
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{ \
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asm volatile ("movl %%gs:%P1(%2),%%eax\n\t" \
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"movl %%gs:4+%P1(%2),%%edx" \
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: "=&A" (__value) \
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: "i" (offsetof (struct rseq_area, member)), \
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"r" (__rseq_offset)); \
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} \
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__value; })
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/* Read member of the RSEQ area directly. */
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#define RSEQ_GETMEM(member) \
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({ \
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_Static_assert (sizeof (RSEQ_SELF()->member) == 1 \
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|| sizeof (RSEQ_SELF()->member) == 4 \
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|| sizeof (RSEQ_SELF()->member) == 8, \
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"size of rseq data"); \
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__RSEQ_GETMEM(member); })
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/* Read member of the RSEQ area directly, with single-copy atomicity semantics.
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Static assert for types >= 64 bits since they can't be loaded atomically on
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x86-32. */
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#define RSEQ_GETMEM_ONCE(member) \
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({ \
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_Static_assert (sizeof (RSEQ_SELF()->member) == 1 \
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|| sizeof (RSEQ_SELF()->member) == 4, \
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"size of rseq data"); \
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__RSEQ_GETMEM(member); })
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#define __RSEQ_SETMEM(member, value) \
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({ \
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if (sizeof (RSEQ_SELF()->member) == 1) \
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asm volatile ("movb %b0,%%gs:%P1(%2)" : \
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: "iq" (value), \
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"i" (offsetof (struct rseq_area, member)), \
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"r" (__rseq_offset)); \
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else if (sizeof (RSEQ_SELF()->member) == 4) \
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asm volatile ("movl %0,%%gs:%P1(%2)" : \
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: "ir" (value), \
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"i" (offsetof (struct rseq_area, member)), \
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"r" (__rseq_offset)); \
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else /* 8 */ \
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{ \
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asm volatile ("movl %%eax,%%gs:%P1(%2)\n\t" \
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"movl %%edx,%%gs:4+%P1(%2)" : \
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: "A" ((uint64_t) cast_to_integer (value)), \
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"i" (offsetof (struct rseq_area, member)), \
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"r" (__rseq_offset)); \
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}})
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/* Set member of the RSEQ area directly. */
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#define RSEQ_SETMEM(member, value) \
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({ \
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_Static_assert (sizeof (RSEQ_SELF()->member) == 1 \
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|| sizeof (RSEQ_SELF()->member) == 4 \
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|| sizeof (RSEQ_SELF()->member) == 8, \
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"size of rseq data"); \
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__RSEQ_SETMEM(member, value); })
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/* Set member of the RSEQ area directly, with single-copy atomicity semantics.
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Static assert for types >= 64 bits since they can't be stored atomically on
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x86-32. */
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#define RSEQ_SETMEM_ONCE(member, value) \
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({ \
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_Static_assert (sizeof (RSEQ_SELF()->member) == 1 \
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|| sizeof (RSEQ_SELF()->member) == 4, \
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"size of rseq data"); \
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__RSEQ_SETMEM(member, value); })
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