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drm/msm/dpu: enable DSPP support on SM8[12]50

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Add support for color correction sub block on SM8150 and SM8250.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Dmitry Baryshkov 2020-11-03 08:21:02 +03:00 • committed by Rob Clark
parent 9b73bde39c
commit 05ae91d960
2 changed files with 22 additions and 7 deletions
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26
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
View file

@ -506,9 +506,9 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
static const struct dpu_lm_cfg sm8150_lm[] = { static const struct dpu_lm_cfg sm8150_lm[] = {
LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK, LM_BLK("lm_0", LM_0, 0x44000, MIXER_SDM845_MASK,
&sdm845_lm_sblk, PINGPONG_0, LM_1, 0), &sdm845_lm_sblk, PINGPONG_0, LM_1, DSPP_0),
LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK, LM_BLK("lm_1", LM_1, 0x45000, MIXER_SDM845_MASK,
&sdm845_lm_sblk, PINGPONG_1, LM_0, 0), &sdm845_lm_sblk, PINGPONG_1, LM_0, DSPP_1),
LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK, LM_BLK("lm_2", LM_2, 0x46000, MIXER_SDM845_MASK,
&sdm845_lm_sblk, PINGPONG_2, LM_3, 0), &sdm845_lm_sblk, PINGPONG_2, LM_3, 0),
LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK, LM_BLK("lm_3", LM_3, 0x47000, MIXER_SDM845_MASK,
@ -527,16 +527,28 @@ static const struct dpu_dspp_sub_blks sc7180_dspp_sblk = {
.len = 0x90, .version = 0x10000}, .len = 0x90, .version = 0x10000},
}; };
#define DSPP_BLK(_name, _id, _base) \ static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = {
.pcc = {.id = DPU_DSPP_PCC, .base = 0x1700,
.len = 0x90, .version = 0x40000},
};
#define DSPP_BLK(_name, _id, _base, _sblk) \
{\ {\
.name = _name, .id = _id, \ .name = _name, .id = _id, \
.base = _base, .len = 0x1800, \ .base = _base, .len = 0x1800, \
.features = DSPP_SC7180_MASK, \ .features = DSPP_SC7180_MASK, \
.sblk = &sc7180_dspp_sblk \ .sblk = _sblk \
} }
static const struct dpu_dspp_cfg sc7180_dspp[] = { static const struct dpu_dspp_cfg sc7180_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000), DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sc7180_dspp_sblk),
};
static const struct dpu_dspp_cfg sm8150_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, &sm8150_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, &sm8150_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, &sm8150_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, &sm8150_dspp_sblk),
}; };
/************************************************************* /*************************************************************
@ -928,6 +940,8 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.sspp = sdm845_sspp, .sspp = sdm845_sspp,
.mixer_count = ARRAY_SIZE(sm8150_lm), .mixer_count = ARRAY_SIZE(sm8150_lm),
.mixer = sm8150_lm, .mixer = sm8150_lm,
.dspp_count = ARRAY_SIZE(sm8150_dspp),
.dspp = sm8150_dspp,
.pingpong_count = ARRAY_SIZE(sm8150_pp), .pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp, .pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
@ -960,6 +974,8 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
.sspp = sdm845_sspp, .sspp = sdm845_sspp,
.mixer_count = ARRAY_SIZE(sm8150_lm), .mixer_count = ARRAY_SIZE(sm8150_lm),
.mixer = sm8150_lm, .mixer = sm8150_lm,
.dspp_count = ARRAY_SIZE(sm8150_dspp),
.dspp = sm8150_dspp,
.pingpong_count = ARRAY_SIZE(sm8150_pp), .pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp, .pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),

3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
View file

@ -57,8 +57,7 @@ static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx,
static void _setup_dspp_ops(struct dpu_hw_dspp *c, static void _setup_dspp_ops(struct dpu_hw_dspp *c,
unsigned long features) unsigned long features)
{ {
if (test_bit(DPU_DSPP_PCC, &features) && if (test_bit(DPU_DSPP_PCC, &features))
IS_SC7180_TARGET(c->hw.hwversion))
c->ops.setup_pcc = dpu_setup_dspp_pcc; c->ops.setup_pcc = dpu_setup_dspp_pcc;
} }