net: stmmac: Add Tx HWTS support to XDP ZC
This patch enables transmit hardware timestamp support to XDP zero copy via XDP Tx metadata framework. This patchset is tested with tools/testing/selftests/bpf/xdp_hw_metadata on Intel Tiger Lake platform. Below are the test steps and results. Command on DUT: sudo ./xdp_hw_metadata <interface name> sudo hwstamp_ctl -i <interface name> -t 1 -r 1 Command on Link Partner: echo -n xdp | nc -u -q1 <destination IPv4 addr> 9091 Result: xsk_ring_cons__peek: 1 0x55bbbf08b6d0: rx_desc[2]->addr=8c100 addr=8c100 comp_addr=8c100 EoP No rx_hash err=-95 rx_timestamp: 1677762688429141540 (sec:1677762688.4291) HW RX-time: 1677762688429141540 (sec:1677762688.4291) delta to User RX-time sec:0.0003 (250.665 usec) XDP RX-time: 1677762688429375597 (sec:1677762688.4294) delta to User RX-time sec:0.0000 (16.608 usec) 0x55bbbf08b6d0: ping-pong with csum=561c (want f488) csum_start=34 csum_offset=6 0x55bbbf08b6d0: complete tx idx=2 addr=2008 tx_timestamp: 1677762688431127273 (sec:1677762688.4311) HW TX-complete-time: 1677762688431127273 (sec:1677762688.4311) delta to User TX-complete-time sec:0.0083 (8331.655 usec) XDP RX-time: 1677762688429375597 (sec:1677762688.4294) delta to User TX-complete-time sec:0.0101 (10083.331 usec) HW RX-time: 1677762688429141540 (sec:1677762688.4291) delta to HW TX-complete-time sec:0.0020 (1985.733 usec) 0x55bbbf08b6d0: complete rx idx=130 addr=8c100 Signed-off-by: Song Yoong Siang <yoong.siang.song@intel.com> Signed-off-by: Stanislav Fomichev <sdf@google.com> Link: https://lore.kernel.org/r/20231127190319.1190813-6-sdf@google.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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2 changed files with 75 additions and 1 deletions
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@ -51,6 +51,7 @@ struct stmmac_tx_info {
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bool last_segment;
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bool is_jumbo;
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enum stmmac_txbuf_type buf_type;
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struct xsk_tx_metadata_compl xsk_meta;
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};
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#define STMMAC_TBS_AVAIL BIT(0)
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@ -100,6 +101,17 @@ struct stmmac_xdp_buff {
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struct dma_desc *ndesc;
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};
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struct stmmac_metadata_request {
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struct stmmac_priv *priv;
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struct dma_desc *tx_desc;
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bool *set_ic;
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};
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struct stmmac_xsk_tx_complete {
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struct stmmac_priv *priv;
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struct dma_desc *desc;
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};
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struct stmmac_rx_queue {
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u32 rx_count_frames;
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u32 queue_index;
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@ -2430,6 +2430,46 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
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}
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}
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static void stmmac_xsk_request_timestamp(void *_priv)
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{
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struct stmmac_metadata_request *meta_req = _priv;
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stmmac_enable_tx_timestamp(meta_req->priv, meta_req->tx_desc);
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*meta_req->set_ic = true;
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}
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static u64 stmmac_xsk_fill_timestamp(void *_priv)
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{
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struct stmmac_xsk_tx_complete *tx_compl = _priv;
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struct stmmac_priv *priv = tx_compl->priv;
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struct dma_desc *desc = tx_compl->desc;
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bool found = false;
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u64 ns = 0;
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if (!priv->hwts_tx_en)
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return 0;
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/* check tx tstamp status */
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if (stmmac_get_tx_timestamp_status(priv, desc)) {
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stmmac_get_timestamp(priv, desc, priv->adv_ts, &ns);
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found = true;
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} else if (!stmmac_get_mac_tx_timestamp(priv, priv->hw, &ns)) {
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found = true;
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}
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if (found) {
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ns -= priv->plat->cdc_error_adj;
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return ns_to_ktime(ns);
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}
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return 0;
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}
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static const struct xsk_tx_metadata_ops stmmac_xsk_tx_metadata_ops = {
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.tmo_request_timestamp = stmmac_xsk_request_timestamp,
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.tmo_fill_timestamp = stmmac_xsk_fill_timestamp,
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};
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static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
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{
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struct netdev_queue *nq = netdev_get_tx_queue(priv->dev, queue);
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@ -2449,6 +2489,8 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
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budget = min(budget, stmmac_tx_avail(priv, queue));
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while (budget-- > 0) {
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struct stmmac_metadata_request meta_req;
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struct xsk_tx_metadata *meta = NULL;
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dma_addr_t dma_addr;
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bool set_ic;
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@ -2472,6 +2514,7 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
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tx_desc = tx_q->dma_tx + entry;
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dma_addr = xsk_buff_raw_get_dma(pool, xdp_desc.addr);
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meta = xsk_buff_get_metadata(pool, xdp_desc.addr);
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xsk_buff_raw_dma_sync_for_device(pool, dma_addr, xdp_desc.len);
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tx_q->tx_skbuff_dma[entry].buf_type = STMMAC_TXBUF_T_XSK_TX;
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@ -2499,6 +2542,11 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
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else
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set_ic = false;
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meta_req.priv = priv;
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meta_req.tx_desc = tx_desc;
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meta_req.set_ic = &set_ic;
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xsk_tx_metadata_request(meta, &stmmac_xsk_tx_metadata_ops,
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&meta_req);
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if (set_ic) {
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tx_q->tx_count_frames = 0;
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stmmac_set_tx_ic(priv, tx_desc);
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@ -2511,6 +2559,9 @@ static bool stmmac_xdp_xmit_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
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stmmac_enable_dma_transmission(priv, priv->ioaddr);
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xsk_tx_metadata_to_compl(meta,
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&tx_q->tx_skbuff_dma[entry].xsk_meta);
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tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size);
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entry = tx_q->cur_tx;
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}
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@ -2620,8 +2671,18 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue,
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} else {
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tx_packets++;
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}
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if (skb)
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if (skb) {
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stmmac_get_tx_hwtstamp(priv, p, skb);
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} else {
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struct stmmac_xsk_tx_complete tx_compl = {
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.priv = priv,
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.desc = p,
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};
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xsk_tx_metadata_complete(&tx_q->tx_skbuff_dma[entry].xsk_meta,
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&stmmac_xsk_tx_metadata_ops,
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&tx_compl);
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}
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}
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if (likely(tx_q->tx_skbuff_dma[entry].buf &&
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@ -7464,6 +7525,7 @@ int stmmac_dvr_probe(struct device *device,
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ndev->netdev_ops = &stmmac_netdev_ops;
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ndev->xdp_metadata_ops = &stmmac_xdp_metadata_ops;
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ndev->xsk_tx_metadata_ops = &stmmac_xsk_tx_metadata_ops;
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ndev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
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NETIF_F_RXCSUM;
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