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arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector

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The schematics label it as SCIF0 debug port.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220614193005.2652-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Wolfram Sang 2022-06-14 21:30:05 +02:00 • committed by Geert Uytterhoeven
parent 4075314425
commit 1614c8624a
2 changed files with 14 additions and 0 deletions
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13
arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
View file

@ -60,6 +60,11 @@
function = "scif3"; function = "scif3";
}; };
scif0_pins: scif0 {
groups = "scif0_data", "scif0_ctrl";
function = "scif0";
};
scif_clk_pins: scif_clk { scif_clk_pins: scif_clk {
groups = "scif_clk"; groups = "scif_clk";
function = "scif_clk"; function = "scif_clk";
@ -79,6 +84,14 @@
status = "okay"; status = "okay";
}; };
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&scif_clk { &scif_clk {
clock-frequency = <24000000>; clock-frequency = <24000000>;
}; };

1
arch/arm64/boot/dts/renesas/r8a779f0-spider.dts
View file

@ -15,6 +15,7 @@
aliases { aliases {
serial0 = &scif3; serial0 = &scif3;
serial1 = &scif0;
}; };
chosen { chosen {