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drm/sun4i: Add separate DE3 VI layer formats

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DE3 VI layers support alpha blending, but DE2 VI layers do not.
Additionally, DE3 VI layers support 10-bit RGB and YUV formats.

Make a separate list for DE3.

Fixes: c50519e6db ("drm/sun4i: Add basic support for DE3")
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20200224173901.174016-3-jernej.skrabec@siol.net
This commit is contained in:
Jernej Skrabec 2020-02-24 18:38:56 +01:00
parent a4769905f0
commit 169ca4b389
3 changed files with 102 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

36
drivers/gpu/drm/sun4i/sun8i_mixer.c
View file

@ -148,6 +148,30 @@ static const struct de2_fmt_info de2_formats[] = {
.rgb = true, .rgb = true,
.csc = SUN8I_CSC_MODE_OFF, .csc = SUN8I_CSC_MODE_OFF,
}, },
{
.drm_fmt = DRM_FORMAT_ARGB2101010,
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB2101010,
.rgb = true,
.csc = SUN8I_CSC_MODE_OFF,
},
{
.drm_fmt = DRM_FORMAT_ABGR2101010,
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR2101010,
.rgb = true,
.csc = SUN8I_CSC_MODE_OFF,
},
{
.drm_fmt = DRM_FORMAT_RGBA1010102,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA1010102,
.rgb = true,
.csc = SUN8I_CSC_MODE_OFF,
},
{
.drm_fmt = DRM_FORMAT_BGRA1010102,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA1010102,
.rgb = true,
.csc = SUN8I_CSC_MODE_OFF,
},
{ {
.drm_fmt = DRM_FORMAT_UYVY, .drm_fmt = DRM_FORMAT_UYVY,
.de2_fmt = SUN8I_MIXER_FBFMT_UYVY, .de2_fmt = SUN8I_MIXER_FBFMT_UYVY,
@ -232,6 +256,18 @@ static const struct de2_fmt_info de2_formats[] = {
.rgb = false, .rgb = false,
.csc = SUN8I_CSC_MODE_YVU2RGB, .csc = SUN8I_CSC_MODE_YVU2RGB,
}, },
{
.drm_fmt = DRM_FORMAT_P010,
.de2_fmt = SUN8I_MIXER_FBFMT_P010_YUV,
.rgb = false,
.csc = SUN8I_CSC_MODE_YUV2RGB,
},
{
.drm_fmt = DRM_FORMAT_P210,
.de2_fmt = SUN8I_MIXER_FBFMT_P210_YUV,
.rgb = false,
.csc = SUN8I_CSC_MODE_YUV2RGB,
},
}; };
const struct de2_fmt_info *sun8i_mixer_format_info(u32 format) const struct de2_fmt_info *sun8i_mixer_format_info(u32 format)

11
drivers/gpu/drm/sun4i/sun8i_mixer.h
View file

@ -93,6 +93,10 @@
#define SUN8I_MIXER_FBFMT_ABGR1555 17 #define SUN8I_MIXER_FBFMT_ABGR1555 17
#define SUN8I_MIXER_FBFMT_RGBA5551 18 #define SUN8I_MIXER_FBFMT_RGBA5551 18
#define SUN8I_MIXER_FBFMT_BGRA5551 19 #define SUN8I_MIXER_FBFMT_BGRA5551 19
#define SUN8I_MIXER_FBFMT_ARGB2101010 20
#define SUN8I_MIXER_FBFMT_ABGR2101010 21
#define SUN8I_MIXER_FBFMT_RGBA1010102 22
#define SUN8I_MIXER_FBFMT_BGRA1010102 23
#define SUN8I_MIXER_FBFMT_YUYV 0 #define SUN8I_MIXER_FBFMT_YUYV 0
#define SUN8I_MIXER_FBFMT_UYVY 1 #define SUN8I_MIXER_FBFMT_UYVY 1
@ -109,6 +113,13 @@
/* format 12 is semi-planar YUV411 UVUV */ /* format 12 is semi-planar YUV411 UVUV */
/* format 13 is semi-planar YUV411 VUVU */ /* format 13 is semi-planar YUV411 VUVU */
#define SUN8I_MIXER_FBFMT_YUV411 14 #define SUN8I_MIXER_FBFMT_YUV411 14
/* format 15 doesn't exist */
/* format 16 is P010 YVU */
#define SUN8I_MIXER_FBFMT_P010_YUV 17
/* format 18 is P210 YVU */
#define SUN8I_MIXER_FBFMT_P210_YUV 19
/* format 20 is packed YVU444 10-bit */
/* format 21 is packed YUV444 10-bit */
/* /*
* Sub-engines listed bellow are unused for now. The EN registers are here only * Sub-engines listed bellow are unused for now. The EN registers are here only

58
drivers/gpu/drm/sun4i/sun8i_vi_layer.c
View file

@ -436,24 +436,76 @@ static const u32 sun8i_vi_layer_formats[] = {
DRM_FORMAT_YVU422, DRM_FORMAT_YVU422,
}; };
static const u32 sun8i_vi_layer_de3_formats[] = {
DRM_FORMAT_ABGR1555,
DRM_FORMAT_ABGR2101010,
DRM_FORMAT_ABGR4444,
DRM_FORMAT_ABGR8888,
DRM_FORMAT_ARGB1555,
DRM_FORMAT_ARGB2101010,
DRM_FORMAT_ARGB4444,
DRM_FORMAT_ARGB8888,
DRM_FORMAT_BGR565,
DRM_FORMAT_BGR888,
DRM_FORMAT_BGRA1010102,
DRM_FORMAT_BGRA5551,
DRM_FORMAT_BGRA4444,
DRM_FORMAT_BGRA8888,
DRM_FORMAT_BGRX8888,
DRM_FORMAT_RGB565,
DRM_FORMAT_RGB888,
DRM_FORMAT_RGBA1010102,
DRM_FORMAT_RGBA4444,
DRM_FORMAT_RGBA5551,
DRM_FORMAT_RGBA8888,
DRM_FORMAT_RGBX8888,
DRM_FORMAT_XBGR8888,
DRM_FORMAT_XRGB8888,
DRM_FORMAT_NV16,
DRM_FORMAT_NV12,
DRM_FORMAT_NV21,
DRM_FORMAT_NV61,
DRM_FORMAT_P010,
DRM_FORMAT_P210,
DRM_FORMAT_UYVY,
DRM_FORMAT_VYUY,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_YUV411,
DRM_FORMAT_YUV420,
DRM_FORMAT_YUV422,
DRM_FORMAT_YVU411,
DRM_FORMAT_YVU420,
DRM_FORMAT_YVU422,
};
struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
struct sun8i_mixer *mixer, struct sun8i_mixer *mixer,
int index) int index)
{ {
u32 supported_encodings, supported_ranges; u32 supported_encodings, supported_ranges;
unsigned int plane_cnt, format_count;
struct sun8i_vi_layer *layer; struct sun8i_vi_layer *layer;
unsigned int plane_cnt; const u32 *formats;
int ret; int ret;
layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL); layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL);
if (!layer) if (!layer)
return ERR_PTR(-ENOMEM); return ERR_PTR(-ENOMEM);
if (mixer->cfg->is_de3) {
formats = sun8i_vi_layer_de3_formats;
format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats);
} else {
formats = sun8i_vi_layer_formats;
format_count = ARRAY_SIZE(sun8i_vi_layer_formats);
}
/* possible crtcs are set later */ /* possible crtcs are set later */
ret = drm_universal_plane_init(drm, &layer->plane, 0, ret = drm_universal_plane_init(drm, &layer->plane, 0,
&sun8i_vi_layer_funcs, &sun8i_vi_layer_funcs,
sun8i_vi_layer_formats, formats, format_count,
ARRAY_SIZE(sun8i_vi_layer_formats),
NULL, DRM_PLANE_TYPE_OVERLAY, NULL); NULL, DRM_PLANE_TYPE_OVERLAY, NULL);
if (ret) { if (ret) {
dev_err(drm->dev, "Couldn't initialize layer\n"); dev_err(drm->dev, "Couldn't initialize layer\n");