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drm/amd/display: Fix compilation errors on DCN314

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We have some compilation errors in some DML files from DCN314 that we
never noticed because we were not compiling some of the DML files. This
commit fixes those syntax errors before we enable the compilation.

Cc: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rodrigo Siqueira 2022-09-01 16:00:52 -04:00 • committed by Alex Deucher
parent f9c182056b
commit 18aefea7fc
1 changed files with 5 additions and 4 deletions
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9
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
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@ -61,7 +61,7 @@
// fudge factor for min dcfclk calclation // fudge factor for min dcfclk calclation
#define __DML_MIN_DCFCLK_FACTOR__ 1.15 #define __DML_MIN_DCFCLK_FACTOR__ 1.15
struct { typedef struct {
double DPPCLK; double DPPCLK;
double DISPCLK; double DISPCLK;
double PixelClock; double PixelClock;
@ -1599,7 +1599,7 @@ static void CalculateDCCConfiguration(
int segment_order_vert_contiguous_luma; int segment_order_vert_contiguous_luma;
int segment_order_vert_contiguous_chroma; int segment_order_vert_contiguous_chroma;
enum { typedef enum {
REQ_256Bytes, REQ_128BytesNonContiguous, REQ_128BytesContiguous, REQ_NA REQ_256Bytes, REQ_128BytesNonContiguous, REQ_128BytesContiguous, REQ_NA
} RequestType; } RequestType;
RequestType RequestLuma; RequestType RequestLuma;
@ -7157,12 +7157,13 @@ static double CalculateExtraLatencyBytes(
HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 1); HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 1);
else else
HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 2); HostVMDynamicLevels = dml_max(0, (int) HostVMMaxNonCachedPageTableLevels - 2);
else } else {
HostVMDynamicLevels = 0; HostVMDynamicLevels = 0;
}
ret = ReorderingBytes + (TotalNumberOfActiveDPP * PixelChunkSizeInKByte + TotalNumberOfDCCActiveDPP * MetaChunkSize) * 1024.0; ret = ReorderingBytes + (TotalNumberOfActiveDPP * PixelChunkSizeInKByte + TotalNumberOfDCCActiveDPP * MetaChunkSize) * 1024.0;
if (GPUVMEnable == true) if (GPUVMEnable == true) {
for (k = 0; k < NumberOfActivePlanes; ++k) for (k = 0; k < NumberOfActivePlanes; ++k)
ret = ret + NumberOfDPP[k] * dpte_group_bytes[k] * (1 + 8 * HostVMDynamicLevels) * HostVMInefficiencyFactor; ret = ret + NumberOfDPP[k] * dpte_group_bytes[k] * (1 + 8 * HostVMDynamicLevels) * HostVMInefficiencyFactor;
} }