drm/amd/pm: Clean up errors in navi10_ppt.c
Fix the following errors reported by checkpatch: ERROR: open brace '{' following function definitions go on the next line ERROR: space required before the open parenthesis '(' ERROR: space required after that ',' (ctx:VxV) ERROR: spaces required around that '=' (ctx:VxW) Signed-off-by: Ran Sun <sunran001@208suo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
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81dc5ccd75
commit
1e3a58df21
1 changed files with 13 additions and 12 deletions
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@ -136,7 +136,7 @@ static struct cmn2asic_msg_mapping navi10_message_map[SMU_MSG_MAX_COUNT] = {
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MSG_MAP(PowerDownJpeg, PPSMC_MSG_PowerDownJpeg, 0),
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MSG_MAP(PowerDownJpeg, PPSMC_MSG_PowerDownJpeg, 0),
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MSG_MAP(BacoAudioD3PME, PPSMC_MSG_BacoAudioD3PME, 0),
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MSG_MAP(BacoAudioD3PME, PPSMC_MSG_BacoAudioD3PME, 0),
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MSG_MAP(ArmD3, PPSMC_MSG_ArmD3, 0),
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MSG_MAP(ArmD3, PPSMC_MSG_ArmD3, 0),
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MSG_MAP(DAL_DISABLE_DUMMY_PSTATE_CHANGE,PPSMC_MSG_DALDisableDummyPstateChange, 0),
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MSG_MAP(DAL_DISABLE_DUMMY_PSTATE_CHANGE, PPSMC_MSG_DALDisableDummyPstateChange, 0),
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MSG_MAP(DAL_ENABLE_DUMMY_PSTATE_CHANGE, PPSMC_MSG_DALEnableDummyPstateChange, 0),
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MSG_MAP(DAL_ENABLE_DUMMY_PSTATE_CHANGE, PPSMC_MSG_DALEnableDummyPstateChange, 0),
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MSG_MAP(GetVoltageByDpm, PPSMC_MSG_GetVoltageByDpm, 0),
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MSG_MAP(GetVoltageByDpm, PPSMC_MSG_GetVoltageByDpm, 0),
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MSG_MAP(GetVoltageByDpmOverdrive, PPSMC_MSG_GetVoltageByDpmOverdrive, 0),
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MSG_MAP(GetVoltageByDpmOverdrive, PPSMC_MSG_GetVoltageByDpmOverdrive, 0),
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@ -556,7 +556,7 @@ static int navi10_get_legacy_smu_metrics_data(struct smu_context *smu,
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MetricsMember_t member,
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MetricsMember_t member,
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uint32_t *value)
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uint32_t *value)
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{
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{
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struct smu_table_context *smu_table= &smu->smu_table;
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struct smu_table_context *smu_table = &smu->smu_table;
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SmuMetrics_legacy_t *metrics =
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SmuMetrics_legacy_t *metrics =
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(SmuMetrics_legacy_t *)smu_table->metrics_table;
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(SmuMetrics_legacy_t *)smu_table->metrics_table;
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int ret = 0;
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int ret = 0;
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@ -642,7 +642,7 @@ static int navi10_get_smu_metrics_data(struct smu_context *smu,
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MetricsMember_t member,
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MetricsMember_t member,
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uint32_t *value)
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uint32_t *value)
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{
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{
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struct smu_table_context *smu_table= &smu->smu_table;
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struct smu_table_context *smu_table = &smu->smu_table;
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SmuMetrics_t *metrics =
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SmuMetrics_t *metrics =
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(SmuMetrics_t *)smu_table->metrics_table;
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(SmuMetrics_t *)smu_table->metrics_table;
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int ret = 0;
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int ret = 0;
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@ -731,7 +731,7 @@ static int navi12_get_legacy_smu_metrics_data(struct smu_context *smu,
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MetricsMember_t member,
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MetricsMember_t member,
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uint32_t *value)
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uint32_t *value)
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{
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{
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struct smu_table_context *smu_table= &smu->smu_table;
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struct smu_table_context *smu_table = &smu->smu_table;
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SmuMetrics_NV12_legacy_t *metrics =
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SmuMetrics_NV12_legacy_t *metrics =
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(SmuMetrics_NV12_legacy_t *)smu_table->metrics_table;
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(SmuMetrics_NV12_legacy_t *)smu_table->metrics_table;
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int ret = 0;
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int ret = 0;
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@ -817,7 +817,7 @@ static int navi12_get_smu_metrics_data(struct smu_context *smu,
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MetricsMember_t member,
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MetricsMember_t member,
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uint32_t *value)
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uint32_t *value)
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{
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{
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struct smu_table_context *smu_table= &smu->smu_table;
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struct smu_table_context *smu_table = &smu->smu_table;
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SmuMetrics_NV12_t *metrics =
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SmuMetrics_NV12_t *metrics =
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(SmuMetrics_NV12_t *)smu_table->metrics_table;
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(SmuMetrics_NV12_t *)smu_table->metrics_table;
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int ret = 0;
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int ret = 0;
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@ -1686,7 +1686,7 @@ static int navi10_force_clk_levels(struct smu_context *smu,
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return 0;
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return 0;
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break;
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break;
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case SMU_DCEFCLK:
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case SMU_DCEFCLK:
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dev_info(smu->adev->dev,"Setting DCEFCLK min/max dpm level is not supported!\n");
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dev_info(smu->adev->dev, "Setting DCEFCLK min/max dpm level is not supported!\n");
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break;
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break;
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default:
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default:
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@ -2182,7 +2182,7 @@ static int navi10_read_sensor(struct smu_context *smu,
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struct smu_table_context *table_context = &smu->smu_table;
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struct smu_table_context *table_context = &smu->smu_table;
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PPTable_t *pptable = table_context->driver_pptable;
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PPTable_t *pptable = table_context->driver_pptable;
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if(!data || !size)
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if (!data || !size)
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return -EINVAL;
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return -EINVAL;
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switch (sensor) {
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switch (sensor) {
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@ -2317,15 +2317,15 @@ static int navi10_display_disable_memory_clock_switch(struct smu_context *smu,
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uint32_t min_memory_clock = smu->hard_min_uclk_req_from_dal;
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uint32_t min_memory_clock = smu->hard_min_uclk_req_from_dal;
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uint32_t max_memory_clock = max_sustainable_clocks->uclock;
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uint32_t max_memory_clock = max_sustainable_clocks->uclock;
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if(smu->disable_uclk_switch == disable_memory_clock_switch)
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if (smu->disable_uclk_switch == disable_memory_clock_switch)
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return 0;
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return 0;
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if(disable_memory_clock_switch)
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if (disable_memory_clock_switch)
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ret = smu_v11_0_set_hard_freq_limited_range(smu, SMU_UCLK, max_memory_clock, 0);
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ret = smu_v11_0_set_hard_freq_limited_range(smu, SMU_UCLK, max_memory_clock, 0);
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else
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else
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ret = smu_v11_0_set_hard_freq_limited_range(smu, SMU_UCLK, min_memory_clock, 0);
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ret = smu_v11_0_set_hard_freq_limited_range(smu, SMU_UCLK, min_memory_clock, 0);
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if(!ret)
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if (!ret)
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smu->disable_uclk_switch = disable_memory_clock_switch;
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smu->disable_uclk_switch = disable_memory_clock_switch;
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return ret;
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return ret;
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@ -2559,7 +2559,8 @@ static int navi10_set_default_od_settings(struct smu_context *smu)
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return 0;
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return 0;
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}
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}
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static int navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size) {
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static int navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long input[], uint32_t size)
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{
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int i;
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int i;
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int ret = 0;
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int ret = 0;
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struct smu_table_context *table_context = &smu->smu_table;
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struct smu_table_context *table_context = &smu->smu_table;
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@ -3368,7 +3369,7 @@ static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu,
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((adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 0)) && smu_version > 0x002A3B00))
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((adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 0)) && smu_version > 0x002A3B00))
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ret = navi10_get_gpu_metrics(smu, table);
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ret = navi10_get_gpu_metrics(smu, table);
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else
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else
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ret =navi10_get_legacy_gpu_metrics(smu, table);
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ret = navi10_get_legacy_gpu_metrics(smu, table);
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break;
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break;
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}
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}
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