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drm/msm/dpu: pass irq to dpu_encoder_helper_wait_for_irq()

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Pass IRQ number directly rather than passing an index in the dpu_encoder's irq table.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/474703/
Link: https://lore.kernel.org/r/20220217043148.480898-7-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Dmitry Baryshkov 2022-02-17 07:31:48 +03:00
parent b8c149e2b1
commit 1e7ac595fa
5 changed files with 29 additions and 28 deletions
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29
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
View file

@ -277,38 +277,35 @@ static int dpu_encoder_helper_wait_event_timeout(int32_t drm_id,
u32 irq_idx, struct dpu_encoder_wait_info *info); u32 irq_idx, struct dpu_encoder_wait_info *info);
int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
enum dpu_intr_idx intr_idx, int irq,
void (*func)(void *arg, int irq_idx), void (*func)(void *arg, int irq_idx),
struct dpu_encoder_wait_info *wait_info) struct dpu_encoder_wait_info *wait_info)
{ {
int irq;
u32 irq_status; u32 irq_status;
int ret; int ret;
if (!wait_info || intr_idx >= INTR_IDX_MAX) { if (!wait_info) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
irq = phys_enc->irq[intr_idx];
/* note: do master / slave checking outside */ /* note: do master / slave checking outside */
/* return EWOULDBLOCK since we know the wait isn't necessary */ /* return EWOULDBLOCK since we know the wait isn't necessary */
if (phys_enc->enable_state == DPU_ENC_DISABLED) { if (phys_enc->enable_state == DPU_ENC_DISABLED) {
DRM_ERROR("encoder is disabled id=%u, intr=%d, irq=%d\n", DRM_ERROR("encoder is disabled id=%u, callback=%ps, irq=%d\n",
DRMID(phys_enc->parent), intr_idx, DRMID(phys_enc->parent), func,
irq); irq);
return -EWOULDBLOCK; return -EWOULDBLOCK;
} }
if (irq < 0) { if (irq < 0) {
DRM_DEBUG_KMS("skip irq wait id=%u, intr=%d\n", DRM_DEBUG_KMS("skip irq wait id=%u, callback=%ps\n",
DRMID(phys_enc->parent), intr_idx); DRMID(phys_enc->parent), func);
return 0; return 0;
} }
DRM_DEBUG_KMS("id=%u, intr=%d, irq=%d, pp=%d, pending_cnt=%d\n", DRM_DEBUG_KMS("id=%u, callback=%ps, irq=%d, pp=%d, pending_cnt=%d\n",
DRMID(phys_enc->parent), intr_idx, DRMID(phys_enc->parent), func,
irq, phys_enc->hw_pp->idx - PINGPONG_0, irq, phys_enc->hw_pp->idx - PINGPONG_0,
atomic_read(wait_info->atomic_cnt)); atomic_read(wait_info->atomic_cnt));
@ -322,8 +319,8 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
if (irq_status) { if (irq_status) {
unsigned long flags; unsigned long flags;
DRM_DEBUG_KMS("irq not triggered id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d\n", DRM_DEBUG_KMS("irq not triggered id=%u, callback=%ps, irq=%d, pp=%d, atomic_cnt=%d\n",
DRMID(phys_enc->parent), intr_idx, DRMID(phys_enc->parent), func,
irq, irq,
phys_enc->hw_pp->idx - PINGPONG_0, phys_enc->hw_pp->idx - PINGPONG_0,
atomic_read(wait_info->atomic_cnt)); atomic_read(wait_info->atomic_cnt));
@ -333,8 +330,8 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
ret = 0; ret = 0;
} else { } else {
ret = -ETIMEDOUT; ret = -ETIMEDOUT;
DRM_DEBUG_KMS("irq timeout id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d\n", DRM_DEBUG_KMS("irq timeout id=%u, callback=%ps, irq=%d, pp=%d, atomic_cnt=%d\n",
DRMID(phys_enc->parent), intr_idx, DRMID(phys_enc->parent), func,
irq, irq,
phys_enc->hw_pp->idx - PINGPONG_0, phys_enc->hw_pp->idx - PINGPONG_0,
atomic_read(wait_info->atomic_cnt)); atomic_read(wait_info->atomic_cnt));
@ -342,7 +339,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
} else { } else {
ret = 0; ret = 0;
trace_dpu_enc_irq_wait_success(DRMID(phys_enc->parent), trace_dpu_enc_irq_wait_success(DRMID(phys_enc->parent),
intr_idx, irq, func, irq,
phys_enc->hw_pp->idx - PINGPONG_0, phys_enc->hw_pp->idx - PINGPONG_0,
atomic_read(wait_info->atomic_cnt)); atomic_read(wait_info->atomic_cnt));
} }

4
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
View file

@ -340,13 +340,13 @@ void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc,
* dpu_encoder_helper_wait_for_irq - utility to wait on an irq. * dpu_encoder_helper_wait_for_irq - utility to wait on an irq.
* note: will call dpu_encoder_helper_wait_for_irq on timeout * note: will call dpu_encoder_helper_wait_for_irq on timeout
* @phys_enc: Pointer to physical encoder structure * @phys_enc: Pointer to physical encoder structure
* @intr_idx: encoder interrupt index * @irq: IRQ index
* @func: IRQ callback to be called in case of timeout * @func: IRQ callback to be called in case of timeout
* @wait_info: wait info struct * @wait_info: wait info struct
* @Return: 0 or -ERROR * @Return: 0 or -ERROR
*/ */
int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
enum dpu_intr_idx intr_idx, int irq,
void (*func)(void *arg, int irq_idx), void (*func)(void *arg, int irq_idx),
struct dpu_encoder_wait_info *wait_info); struct dpu_encoder_wait_info *wait_info);

9
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
View file

@ -214,7 +214,8 @@ static int _dpu_encoder_phys_cmd_wait_for_idle(
wait_info.atomic_cnt = &phys_enc->pending_kickoff_cnt; wait_info.atomic_cnt = &phys_enc->pending_kickoff_cnt;
wait_info.timeout_ms = KICKOFF_TIMEOUT_MS; wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;
ret = dpu_encoder_helper_wait_for_irq(phys_enc, INTR_IDX_PINGPONG, ret = dpu_encoder_helper_wait_for_irq(phys_enc,
phys_enc->irq[INTR_IDX_PINGPONG],
dpu_encoder_phys_cmd_pp_tx_done_irq, dpu_encoder_phys_cmd_pp_tx_done_irq,
&wait_info); &wait_info);
if (ret == -ETIMEDOUT) if (ret == -ETIMEDOUT)
@ -632,7 +633,8 @@ static int _dpu_encoder_phys_cmd_wait_for_ctl_start(
wait_info.atomic_cnt = &phys_enc->pending_ctlstart_cnt; wait_info.atomic_cnt = &phys_enc->pending_ctlstart_cnt;
wait_info.timeout_ms = KICKOFF_TIMEOUT_MS; wait_info.timeout_ms = KICKOFF_TIMEOUT_MS;
ret = dpu_encoder_helper_wait_for_irq(phys_enc, INTR_IDX_CTL_START, ret = dpu_encoder_helper_wait_for_irq(phys_enc,
phys_enc->irq[INTR_IDX_CTL_START],
dpu_encoder_phys_cmd_ctl_start_irq, dpu_encoder_phys_cmd_ctl_start_irq,
&wait_info); &wait_info);
if (ret == -ETIMEDOUT) { if (ret == -ETIMEDOUT) {
@ -691,7 +693,8 @@ static int dpu_encoder_phys_cmd_wait_for_vblank(
atomic_inc(&cmd_enc->pending_vblank_cnt); atomic_inc(&cmd_enc->pending_vblank_cnt);
rc = dpu_encoder_helper_wait_for_irq(phys_enc, INTR_IDX_RDPTR, rc = dpu_encoder_helper_wait_for_irq(phys_enc,
phys_enc->irq[INTR_IDX_RDPTR],
dpu_encoder_phys_cmd_pp_rd_ptr_irq, dpu_encoder_phys_cmd_pp_rd_ptr_irq,
&wait_info); &wait_info);

3
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
View file

@ -474,7 +474,8 @@ static int dpu_encoder_phys_vid_wait_for_vblank(
} }
/* Wait for kickoff to complete */ /* Wait for kickoff to complete */
ret = dpu_encoder_helper_wait_for_irq(phys_enc, INTR_IDX_VSYNC, ret = dpu_encoder_helper_wait_for_irq(phys_enc,
phys_enc->irq[INTR_IDX_VSYNC],
dpu_encoder_phys_vid_vblank_irq, dpu_encoder_phys_vid_vblank_irq,
&wait_info); &wait_info);

12
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
View file

@ -188,25 +188,25 @@ DEFINE_EVENT(dpu_irq_template, dpu_irq_unregister_success,
); );
TRACE_EVENT(dpu_enc_irq_wait_success, TRACE_EVENT(dpu_enc_irq_wait_success,
TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, TP_PROTO(uint32_t drm_id, void *func,
int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt), int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt),
TP_ARGS(drm_id, intr_idx, irq_idx, pp_idx, atomic_cnt), TP_ARGS(drm_id, func, irq_idx, pp_idx, atomic_cnt),
TP_STRUCT__entry( TP_STRUCT__entry(
__field( uint32_t, drm_id ) __field( uint32_t, drm_id )
__field( enum dpu_intr_idx, intr_idx ) __field( void *, func )
__field( int, irq_idx ) __field( int, irq_idx )
__field( enum dpu_pingpong, pp_idx ) __field( enum dpu_pingpong, pp_idx )
__field( int, atomic_cnt ) __field( int, atomic_cnt )
), ),
TP_fast_assign( TP_fast_assign(
__entry->drm_id = drm_id; __entry->drm_id = drm_id;
__entry->intr_idx = intr_idx; __entry->func = func;
__entry->irq_idx = irq_idx; __entry->irq_idx = irq_idx;
__entry->pp_idx = pp_idx; __entry->pp_idx = pp_idx;
__entry->atomic_cnt = atomic_cnt; __entry->atomic_cnt = atomic_cnt;
), ),
TP_printk("id=%u, intr=%d, irq=%d, pp=%d, atomic_cnt=%d", TP_printk("id=%u, callback=%ps, irq=%d, pp=%d, atomic_cnt=%d",
__entry->drm_id, __entry->intr_idx, __entry->drm_id, __entry->func,
__entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt) __entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt)
); );