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KVM: PPC: Book3S HV P9: Optimise hash guest SLB saving

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slbmfee/slbmfev instructions are very expensive, moreso than a regular
mfspr instruction, so minimising them significantly improves hash guest
exit performance. The slbmfev is only required if slbmfee found a valid
SLB entry.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211123095231.1036501-47-npiggin@gmail.com
This commit is contained in:
Nicholas Piggin 2021-11-23 19:52:24 +10:00 • committed by Michael Ellerman
parent b49c65c5f9
commit 241d1f19f0
1 changed files with 18 additions and 4 deletions
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22
arch/powerpc/kvm/book3s_hv_p9_entry.c
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@ -487,10 +487,22 @@ static void __accumulate_time(struct kvm_vcpu *vcpu, struct kvmhv_tb_accumulator
#define accumulate_time(vcpu, next) do {} while (0) #define accumulate_time(vcpu, next) do {} while (0)
#endif #endif
static inline void mfslb(unsigned int idx, u64 *slbee, u64 *slbev) static inline u64 mfslbv(unsigned int idx)
{ {
asm volatile("slbmfev %0,%1" : "=r" (*slbev) : "r" (idx)); u64 slbev;
asm volatile("slbmfee %0,%1" : "=r" (*slbee) : "r" (idx));
asm volatile("slbmfev %0,%1" : "=r" (slbev) : "r" (idx));
return slbev;
}
static inline u64 mfslbe(unsigned int idx)
{
u64 slbee;
asm volatile("slbmfee %0,%1" : "=r" (slbee) : "r" (idx));
return slbee;
} }
static inline void mtslb(u64 slbee, u64 slbev) static inline void mtslb(u64 slbee, u64 slbev)
@ -620,8 +632,10 @@ static void save_clear_guest_mmu(struct kvm *kvm, struct kvm_vcpu *vcpu)
*/ */
for (i = 0; i < vcpu->arch.slb_nr; i++) { for (i = 0; i < vcpu->arch.slb_nr; i++) {
u64 slbee, slbev; u64 slbee, slbev;
mfslb(i, &slbee, &slbev);
slbee = mfslbe(i);
if (slbee & SLB_ESID_V) { if (slbee & SLB_ESID_V) {
slbev = mfslbv(i);
vcpu->arch.slb[nr].orige = slbee | i; vcpu->arch.slb[nr].orige = slbee | i;
vcpu->arch.slb[nr].origv = slbev; vcpu->arch.slb[nr].origv = slbev;
nr++; nr++;