drm/amdgpu: Add amdgpu_bo_is_vm_bo helper
Help code readability by replacing a bunch of: bo->tbo.base.resv == vm->root.bo->tbo.base.resv With: amdgpu_vm_is_bo_always_valid(vm, bo) No functional changes. v2: * Rename helper and move to amdgpu_vm. (Christian) v3: * Use Christian's kerneldoc. v4: * Fixed logic inversion in amdgpu_vm_bo_get_memory. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 29 additions and 16 deletions
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@ -174,7 +174,7 @@ static int amdgpu_gem_object_open(struct drm_gem_object *obj,
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return -EPERM;
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return -EPERM;
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if (abo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID &&
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if (abo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID &&
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abo->tbo.base.resv != vm->root.bo->tbo.base.resv)
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!amdgpu_vm_is_bo_always_valid(vm, abo))
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return -EPERM;
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return -EPERM;
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r = amdgpu_bo_reserve(abo, false);
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r = amdgpu_bo_reserve(abo, false);
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@ -333,7 +333,7 @@ void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
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base->next = bo->vm_bo;
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base->next = bo->vm_bo;
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bo->vm_bo = base;
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bo->vm_bo = base;
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if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv)
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if (!amdgpu_vm_is_bo_always_valid(vm, bo))
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return;
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return;
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dma_resv_assert_held(vm->root.bo->tbo.base.resv);
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dma_resv_assert_held(vm->root.bo->tbo.base.resv);
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@ -1101,13 +1101,13 @@ static void amdgpu_vm_bo_get_memory(struct amdgpu_bo_va *bo_va,
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* For now ignore BOs which are currently locked and potentially
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* For now ignore BOs which are currently locked and potentially
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* changing their location.
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* changing their location.
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*/
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*/
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if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv &&
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if (!amdgpu_vm_is_bo_always_valid(vm, bo) &&
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!dma_resv_trylock(bo->tbo.base.resv))
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!dma_resv_trylock(bo->tbo.base.resv))
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return;
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return;
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amdgpu_bo_get_memory(bo, stats);
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amdgpu_bo_get_memory(bo, stats);
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if (bo->tbo.base.resv != vm->root.bo->tbo.base.resv)
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if (!amdgpu_vm_is_bo_always_valid(vm, bo))
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dma_resv_unlock(bo->tbo.base.resv);
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dma_resv_unlock(bo->tbo.base.resv);
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}
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}
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void amdgpu_vm_get_memory(struct amdgpu_vm *vm,
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void amdgpu_vm_get_memory(struct amdgpu_vm *vm,
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@ -1203,8 +1203,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
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uncached = false;
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uncached = false;
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}
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}
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if (clear || (bo && bo->tbo.base.resv ==
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if (clear || amdgpu_vm_is_bo_always_valid(vm, bo))
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vm->root.bo->tbo.base.resv))
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last_update = &vm->last_update;
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last_update = &vm->last_update;
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else
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else
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last_update = &bo_va->last_pt_update;
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last_update = &bo_va->last_pt_update;
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@ -1246,7 +1245,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
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* the evicted list so that it gets validated again on the
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* the evicted list so that it gets validated again on the
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* next command submission.
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* next command submission.
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*/
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*/
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if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv) {
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if (amdgpu_vm_is_bo_always_valid(vm, bo)) {
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uint32_t mem_type = bo->tbo.resource->mem_type;
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uint32_t mem_type = bo->tbo.resource->mem_type;
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if (!(bo->preferred_domains &
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if (!(bo->preferred_domains &
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@ -1640,10 +1639,9 @@ static void amdgpu_vm_bo_insert_map(struct amdgpu_device *adev,
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if (mapping->flags & AMDGPU_PTE_PRT_FLAG(adev))
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if (mapping->flags & AMDGPU_PTE_PRT_FLAG(adev))
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amdgpu_vm_prt_get(adev);
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amdgpu_vm_prt_get(adev);
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if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv &&
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if (amdgpu_vm_is_bo_always_valid(vm, bo) && !bo_va->base.moved)
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!bo_va->base.moved) {
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amdgpu_vm_bo_moved(&bo_va->base);
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amdgpu_vm_bo_moved(&bo_va->base);
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}
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trace_amdgpu_vm_bo_map(bo_va, mapping);
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trace_amdgpu_vm_bo_map(bo_va, mapping);
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}
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}
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@ -1942,7 +1940,7 @@ int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev,
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if (before->flags & AMDGPU_PTE_PRT_FLAG(adev))
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if (before->flags & AMDGPU_PTE_PRT_FLAG(adev))
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amdgpu_vm_prt_get(adev);
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amdgpu_vm_prt_get(adev);
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if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv &&
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if (amdgpu_vm_is_bo_always_valid(vm, bo) &&
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!before->bo_va->base.moved)
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!before->bo_va->base.moved)
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amdgpu_vm_bo_moved(&before->bo_va->base);
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amdgpu_vm_bo_moved(&before->bo_va->base);
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} else {
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} else {
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@ -1957,7 +1955,7 @@ int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev,
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if (after->flags & AMDGPU_PTE_PRT_FLAG(adev))
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if (after->flags & AMDGPU_PTE_PRT_FLAG(adev))
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amdgpu_vm_prt_get(adev);
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amdgpu_vm_prt_get(adev);
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if (bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv &&
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if (amdgpu_vm_is_bo_always_valid(vm, bo) &&
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!after->bo_va->base.moved)
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!after->bo_va->base.moved)
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amdgpu_vm_bo_moved(&after->bo_va->base);
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amdgpu_vm_bo_moved(&after->bo_va->base);
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} else {
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} else {
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@ -2037,7 +2035,7 @@ void amdgpu_vm_bo_del(struct amdgpu_device *adev,
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if (bo) {
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if (bo) {
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dma_resv_assert_held(bo->tbo.base.resv);
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dma_resv_assert_held(bo->tbo.base.resv);
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if (bo->tbo.base.resv == vm->root.bo->tbo.base.resv)
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if (amdgpu_vm_is_bo_always_valid(vm, bo))
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ttm_bo_set_bulk_move(&bo->tbo, NULL);
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ttm_bo_set_bulk_move(&bo->tbo, NULL);
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for (base = &bo_va->base.bo->vm_bo; *base;
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for (base = &bo_va->base.bo->vm_bo; *base;
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@ -2131,7 +2129,7 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
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for (bo_base = bo->vm_bo; bo_base; bo_base = bo_base->next) {
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for (bo_base = bo->vm_bo; bo_base; bo_base = bo_base->next) {
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struct amdgpu_vm *vm = bo_base->vm;
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struct amdgpu_vm *vm = bo_base->vm;
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if (evicted && bo->tbo.base.resv == vm->root.bo->tbo.base.resv) {
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if (evicted && amdgpu_vm_is_bo_always_valid(vm, bo)) {
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amdgpu_vm_bo_evicted(bo_base);
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amdgpu_vm_bo_evicted(bo_base);
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continue;
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continue;
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}
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}
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@ -2142,7 +2140,7 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
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if (bo->tbo.type == ttm_bo_type_kernel)
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if (bo->tbo.type == ttm_bo_type_kernel)
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amdgpu_vm_bo_relocated(bo_base);
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amdgpu_vm_bo_relocated(bo_base);
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else if (bo->tbo.base.resv == vm->root.bo->tbo.base.resv)
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else if (amdgpu_vm_is_bo_always_valid(vm, bo))
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amdgpu_vm_bo_moved(bo_base);
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amdgpu_vm_bo_moved(bo_base);
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else
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else
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amdgpu_vm_bo_invalidated(bo_base);
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amdgpu_vm_bo_invalidated(bo_base);
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@ -3006,3 +3004,16 @@ void amdgpu_vm_update_fault_cache(struct amdgpu_device *adev,
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xa_unlock_irqrestore(&adev->vm_manager.pasids, flags);
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xa_unlock_irqrestore(&adev->vm_manager.pasids, flags);
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}
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}
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/**
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* amdgpu_vm_is_bo_always_valid - check if the BO is VM always valid
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*
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* @vm: VM to test against.
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* @abo: BO to be tested.
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*
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* Returns true if the BO shares the dma_resv object with the root PD and is
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* always guaranteed to be valid inside the VM.
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*/
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bool amdgpu_vm_is_bo_always_valid(struct amdgpu_vm *vm, struct amdgpu_bo *bo)
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{
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return bo && bo->tbo.base.resv == vm->root.bo->tbo.base.resv;
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}
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@ -580,6 +580,8 @@ void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m);
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int amdgpu_vm_pt_map_tables(struct amdgpu_device *adev, struct amdgpu_vm *vm);
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int amdgpu_vm_pt_map_tables(struct amdgpu_device *adev, struct amdgpu_vm *vm);
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bool amdgpu_vm_is_bo_always_valid(struct amdgpu_vm *vm, struct amdgpu_bo *bo);
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/**
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/**
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* amdgpu_vm_tlb_seq - return tlb flush sequence number
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* amdgpu_vm_tlb_seq - return tlb flush sequence number
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* @vm: the amdgpu_vm structure to query
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* @vm: the amdgpu_vm structure to query
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