niansa-misc/linux
1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
Code Issues Projects Releases Packages Wiki Activity

x86: Add native_[ig]dt_invalidate()

Browse source 
In some places, the native forms of descriptor table invalidation is
required. Rather than open-coding them, add explicitly native functions to
invalidate the GDT and IDT.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20210519212154.511983-6-hpa@zytor.com
This commit is contained in:
H. Peter Anvin (Intel) 2021-05-19 14:21:51 -07:00 • committed by Thomas Gleixner
parent 8ec9069a43
commit 283fa3b648
1 changed files with 20 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
arch/x86/include/asm/desc.h
View file

@ -224,6 +224,26 @@ static inline void store_idt(struct desc_ptr *dtr)
asm volatile("sidt %0":"=m" (*dtr)); asm volatile("sidt %0":"=m" (*dtr));
} }
static inline void native_gdt_invalidate(void)
{
const struct desc_ptr invalid_gdt = {
.address = 0,
.size = 0
};
native_load_gdt(&invalid_gdt);
}
static inline void native_idt_invalidate(void)
{
const struct desc_ptr invalid_idt = {
.address = 0,
.size = 0
};
native_load_idt(&invalid_idt);
}
/* /*
* The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is * The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is
* a read-only remapping. To prevent a page fault, the GDT is switched to the * a read-only remapping. To prevent a page fault, the GDT is switched to the