dt-bindings: display/msm: split dpu-sc7280 into DPU and MDSS parts
In order to make the schema more readable, split dpu-sc7280 into the DPU and MDSS parts, each one describing just a single device binding. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/508387/ Link: https://lore.kernel.org/r/20221024164225.3236654-8-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Dmitry Baryshkov
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3 changed files with 228 additions and 162 deletions
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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Display DPU dt properties for SC7280
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maintainers:
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- Krishna Manikandan <quic_mkrishn@quicinc.com>
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description: |
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Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
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sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
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bindings of MDSS and DPU are mentioned for SC7280.
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$ref: /schemas/display/msm/mdss-common.yaml#
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properties:
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compatible:
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const: qcom,sc7280-mdss
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clocks:
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items:
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- description: Display AHB clock from gcc
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- description: Display AHB clock from dispcc
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- description: Display core clock
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clock-names:
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items:
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- const: iface
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- const: ahb
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- const: core
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iommus:
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maxItems: 1
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interconnects:
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maxItems: 1
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interconnect-names:
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maxItems: 1
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patternProperties:
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"^display-controller@[0-9a-f]+$":
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type: object
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$ref: /schemas/display/msm/dpu-common.yaml#
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description: Node containing the properties of DPU.
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unevaluatedProperties: false
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properties:
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compatible:
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const: qcom,sc7280-dpu
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reg:
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items:
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- description: Address offset and size for mdp register set
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- description: Address offset and size for vbif register set
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reg-names:
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items:
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- const: mdp
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- const: vbif
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clocks:
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items:
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- description: Display hf axi clock
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- description: Display sf axi clock
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- description: Display ahb clock
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- description: Display lut clock
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- description: Display core clock
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- description: Display vsync clock
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clock-names:
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items:
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- const: bus
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- const: nrt_bus
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- const: iface
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- const: lut
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- const: core
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- const: vsync
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,dispcc-sc7280.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interconnect/qcom,sc7280.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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display-subsystem@ae00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "qcom,sc7280-mdss";
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reg = <0xae00000 0x1000>;
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reg-names = "mdss";
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power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
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clocks = <&gcc GCC_DISP_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_CLK>;
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clock-names = "iface",
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"ahb",
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"core";
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
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interconnect-names = "mdp0-mem";
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iommus = <&apps_smmu 0x900 0x402>;
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ranges;
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display-controller@ae01000 {
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compatible = "qcom,sc7280-dpu";
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reg = <0x0ae01000 0x8f000>,
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<0x0aeb0000 0x2008>;
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reg-names = "mdp", "vbif";
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clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
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<&gcc GCC_DISP_SF_AXI_CLK>,
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<&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_CLK>,
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<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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clock-names = "bus",
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"nrt_bus",
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"iface",
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"lut",
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"core",
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"vsync";
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interrupt-parent = <&mdss>;
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interrupts = <0>;
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power-domains = <&rpmhpd SC7280_CX>;
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operating-points-v2 = <&mdp_opp_table>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dpu_intf1_out: endpoint {
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remote-endpoint = <&dsi0_in>;
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};
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};
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port@1 {
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reg = <1>;
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dpu_intf5_out: endpoint {
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remote-endpoint = <&edp_in>;
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};
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};
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};
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};
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};
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...
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@ -0,0 +1,98 @@
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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-dpu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Display DPU dt properties for SC7280
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maintainers:
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- Krishna Manikandan <quic_mkrishn@quicinc.com>
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$ref: /schemas/display/msm/dpu-common.yaml#
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properties:
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compatible:
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const: qcom,sc7280-dpu
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reg:
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items:
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- description: Address offset and size for mdp register set
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- description: Address offset and size for vbif register set
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reg-names:
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items:
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- const: mdp
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- const: vbif
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clocks:
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items:
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- description: Display hf axi clock
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- description: Display sf axi clock
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- description: Display ahb clock
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- description: Display lut clock
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- description: Display core clock
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- description: Display vsync clock
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clock-names:
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items:
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- const: bus
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- const: nrt_bus
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- const: iface
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- const: lut
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- const: core
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- const: vsync
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,dispcc-sc7280.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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display-controller@ae01000 {
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compatible = "qcom,sc7280-dpu";
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reg = <0x0ae01000 0x8f000>,
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<0x0aeb0000 0x2008>;
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reg-names = "mdp", "vbif";
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clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
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<&gcc GCC_DISP_SF_AXI_CLK>,
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<&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_CLK>,
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<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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clock-names = "bus",
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"nrt_bus",
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"iface",
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"lut",
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"core",
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"vsync";
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interrupt-parent = <&mdss>;
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interrupts = <0>;
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power-domains = <&rpmhpd SC7280_CX>;
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operating-points-v2 = <&mdp_opp_table>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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endpoint {
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remote-endpoint = <&dsi0_in>;
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};
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};
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port@1 {
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reg = <1>;
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endpoint {
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remote-endpoint = <&edp_in>;
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};
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};
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};
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};
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...
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@ -0,0 +1,130 @@
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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SC7280 Display MDSS
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maintainers:
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- Krishna Manikandan <quic_mkrishn@quicinc.com>
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description:
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Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
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sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
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bindings of MDSS are mentioned for SC7280.
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$ref: /schemas/display/msm/mdss-common.yaml#
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properties:
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compatible:
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const: qcom,sc7280-mdss
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clocks:
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items:
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- description: Display AHB clock from gcc
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- description: Display AHB clock from dispcc
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- description: Display core clock
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clock-names:
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items:
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- const: iface
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- const: ahb
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- const: core
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iommus:
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maxItems: 1
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interconnects:
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maxItems: 1
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interconnect-names:
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maxItems: 1
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patternProperties:
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"^display-controller@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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const: qcom,sc7280-dpu
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,dispcc-sc7280.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interconnect/qcom,sc7280.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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display-subsystem@ae00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "qcom,sc7280-mdss";
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reg = <0xae00000 0x1000>;
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reg-names = "mdss";
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power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
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clocks = <&gcc GCC_DISP_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_CLK>;
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clock-names = "iface",
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"ahb",
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"core";
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>;
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interconnect-names = "mdp0-mem";
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iommus = <&apps_smmu 0x900 0x402>;
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ranges;
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display-controller@ae01000 {
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compatible = "qcom,sc7280-dpu";
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reg = <0x0ae01000 0x8f000>,
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<0x0aeb0000 0x2008>;
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reg-names = "mdp", "vbif";
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clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
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<&gcc GCC_DISP_SF_AXI_CLK>,
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<&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
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<&dispcc DISP_CC_MDSS_MDP_CLK>,
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<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
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clock-names = "bus",
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"nrt_bus",
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"iface",
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"lut",
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"core",
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"vsync";
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interrupt-parent = <&mdss>;
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interrupts = <0>;
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power-domains = <&rpmhpd SC7280_CX>;
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operating-points-v2 = <&mdp_opp_table>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dpu_intf1_out: endpoint {
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remote-endpoint = <&dsi0_in>;
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};
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};
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port@1 {
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reg = <1>;
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dpu_intf5_out: endpoint {
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remote-endpoint = <&edp_in>;
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};
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};
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};
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};
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};
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...
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