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ARM: KVM: Fix MPIDR computing to support virtual clusters

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In order to be able to support more than 4 A7 or A15 CPUs,
we need to fix the MPIDR computing to reflect the fact that
both A15 and A7 can only exist in clusters of at most 4 CPUs.

Fix the MPIDR computing to allow virtual clusters to be exposed
to the guest.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This commit is contained in:
Marc Zyngier 2013-10-18 18:19:04 +01:00 • committed by Christoffer Dall
parent e4b3c9c21b
commit 2d1d841bd4
1 changed files with 6 additions and 4 deletions
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10
arch/arm/kvm/coproc.c
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@ -74,11 +74,13 @@ int kvm_handle_cp14_access(struct kvm_vcpu *vcpu, struct kvm_run *run)
static void reset_mpidr(struct kvm_vcpu *vcpu, const struct coproc_reg *r) static void reset_mpidr(struct kvm_vcpu *vcpu, const struct coproc_reg *r)
{ {
/* /*
* Compute guest MPIDR. No need to mess around with different clusters * Compute guest MPIDR. We build a virtual cluster out of the
* but we read the 'U' bit from the underlying hardware directly. * vcpu_id, but we read the 'U' bit from the underlying
* hardware directly.
*/ */
vcpu->arch.cp15[c0_MPIDR] = (read_cpuid_mpidr() & MPIDR_SMP_BITMASK) vcpu->arch.cp15[c0_MPIDR] = ((read_cpuid_mpidr() & MPIDR_SMP_BITMASK) |
| vcpu->vcpu_id; ((vcpu->vcpu_id >> 2) << MPIDR_LEVEL_BITS) |
(vcpu->vcpu_id & 3));
} }
/* TRM entries A7:4.3.31 A15:4.3.28 - RO WI */ /* TRM entries A7:4.3.31 A15:4.3.28 - RO WI */