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m68k: m5441x: add flexcan support

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Add flexcan support.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>

Made the flexcan resource inclusion conditional based on the enablement
of the flexcan driver. This commit is no longer dependant on the
presence of the updated driver in mainline.

Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
This commit is contained in:
Angelo Dureghello 2021-07-02 11:48:39 +02:00 • committed by Greg Ungerer
parent 40cff49289
commit 35a9f9363a
3 changed files with 67 additions and 4 deletions
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44
arch/m68k/coldfire/device.c
View file

@ -581,6 +581,47 @@ static struct platform_device mcf_esdhc = {
}; };
#endif /* MCFSDHC_BASE */ #endif /* MCFSDHC_BASE */
#if IS_ENABLED(CONFIG_CAN_FLEXCAN)
#include <linux/can/platform/flexcan.h>
static struct flexcan_platform_data mcf5441x_flexcan_info = {
.clk_src = 1,
.clock_frequency = 120000000,
};
static struct resource mcf5441x_flexcan0_resource[] = {
{
.start = MCFFLEXCAN_BASE0,
.end = MCFFLEXCAN_BASE0 + MCFFLEXCAN_SIZE,
.flags = IORESOURCE_MEM,
},
{
.start = MCF_IRQ_IFL0,
.end = MCF_IRQ_IFL0,
.flags = IORESOURCE_IRQ,
},
{
.start = MCF_IRQ_BOFF0,
.end = MCF_IRQ_BOFF0,
.flags = IORESOURCE_IRQ,
},
{
.start = MCF_IRQ_ERR0,
.end = MCF_IRQ_ERR0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mcf_flexcan0 = {
.name = "flexcan-mcf5441x",
.id = 0,
.num_resources = ARRAY_SIZE(mcf5441x_flexcan0_resource),
.resource = mcf5441x_flexcan0_resource,
.dev.platform_data = &mcf5441x_flexcan_info,
};
#endif /* IS_ENABLED(CONFIG_CAN_FLEXCAN) */
static struct platform_device *mcf_devices[] __initdata = { static struct platform_device *mcf_devices[] __initdata = {
&mcf_uart, &mcf_uart,
#if IS_ENABLED(CONFIG_FEC) #if IS_ENABLED(CONFIG_FEC)
@ -616,6 +657,9 @@ static struct platform_device *mcf_devices[] __initdata = {
#ifdef MCFSDHC_BASE #ifdef MCFSDHC_BASE
&mcf_esdhc, &mcf_esdhc,
#endif #endif
#if IS_ENABLED(CONFIG_CAN_FLEXCAN)
&mcf_flexcan0,
#endif
}; };
/* /*

8
arch/m68k/coldfire/m5441x.c
View file

@ -19,8 +19,8 @@
#include <asm/mcfclk.h> #include <asm/mcfclk.h>
DEFINE_CLK(0, "flexbus", 2, MCF_CLK); DEFINE_CLK(0, "flexbus", 2, MCF_CLK);
DEFINE_CLK(0, "mcfcan.0", 8, MCF_CLK); DEFINE_CLK(0, "flexcan.0", 8, MCF_CLK);
DEFINE_CLK(0, "mcfcan.1", 9, MCF_CLK); DEFINE_CLK(0, "flexcan.1", 9, MCF_CLK);
DEFINE_CLK(0, "imx1-i2c.1", 14, MCF_CLK); DEFINE_CLK(0, "imx1-i2c.1", 14, MCF_CLK);
DEFINE_CLK(0, "mcfdspi.1", 15, MCF_CLK); DEFINE_CLK(0, "mcfdspi.1", 15, MCF_CLK);
DEFINE_CLK(0, "edma", 17, MCF_CLK); DEFINE_CLK(0, "edma", 17, MCF_CLK);
@ -142,6 +142,8 @@ static struct clk_lookup m5411x_clk_lookup[] = {
static struct clk * const enable_clks[] __initconst = { static struct clk * const enable_clks[] __initconst = {
/* make sure these clocks are enabled */ /* make sure these clocks are enabled */
&__clk_0_8, /* flexcan.0 */
&__clk_0_9, /* flexcan.1 */
&__clk_0_15, /* dspi.1 */ &__clk_0_15, /* dspi.1 */
&__clk_0_17, /* eDMA */ &__clk_0_17, /* eDMA */
&__clk_0_18, /* intc0 */ &__clk_0_18, /* intc0 */
@ -162,8 +164,6 @@ static struct clk * const enable_clks[] __initconst = {
&__clk_1_37, /* gpio */ &__clk_1_37, /* gpio */
}; };
static struct clk * const disable_clks[] __initconst = { static struct clk * const disable_clks[] __initconst = {
&__clk_0_8, /* can.0 */
&__clk_0_9, /* can.1 */
&__clk_0_14, /* i2c.1 */ &__clk_0_14, /* i2c.1 */
&__clk_0_22, /* i2c.0 */ &__clk_0_22, /* i2c.0 */
&__clk_0_23, /* dspi.0 */ &__clk_0_23, /* dspi.0 */

19
arch/m68k/include/asm/m5441xsim.h
View file

@ -73,6 +73,12 @@
#define MCFINT0_FECENTC1 55 #define MCFINT0_FECENTC1 55
/* on interrupt controller 1 */ /* on interrupt controller 1 */
#define MCFINT1_FLEXCAN0_IFL 0
#define MCFINT1_FLEXCAN0_BOFF 1
#define MCFINT1_FLEXCAN0_ERR 3
#define MCFINT1_FLEXCAN1_IFL 4
#define MCFINT1_FLEXCAN1_BOFF 5
#define MCFINT1_FLEXCAN1_ERR 7
#define MCFINT1_UART4 48 #define MCFINT1_UART4 48
#define MCFINT1_UART5 49 #define MCFINT1_UART5 49
#define MCFINT1_UART6 50 #define MCFINT1_UART6 50
@ -314,4 +320,17 @@
#define MCF_IRQ_SDHC (MCFINT2_VECBASE + MCFINT2_SDHC) #define MCF_IRQ_SDHC (MCFINT2_VECBASE + MCFINT2_SDHC)
#define MCFSDHC_CLK (MCFSDHC_BASE + 0x2c) #define MCFSDHC_CLK (MCFSDHC_BASE + 0x2c)
/*
* Flexcan module
*/
#define MCFFLEXCAN_BASE0 0xfc020000
#define MCFFLEXCAN_BASE1 0xfc024000
#define MCFFLEXCAN_SIZE 0x4000
#define MCF_IRQ_IFL0 (MCFINT1_VECBASE + MCFINT1_FLEXCAN0_IFL)
#define MCF_IRQ_BOFF0 (MCFINT1_VECBASE + MCFINT1_FLEXCAN0_BOFF)
#define MCF_IRQ_ERR0 (MCFINT1_VECBASE + MCFINT1_FLEXCAN0_ERR)
#define MCF_IRQ_IFL1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_IFL)
#define MCF_IRQ_BOFF1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_BOFF)
#define MCF_IRQ_ERR1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_ERR)
#endif /* m5441xsim_h */ #endif /* m5441xsim_h */