niansa-misc/linux
1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
Code Issues Projects Releases Packages Wiki Activity

drm/amdgpu: refine gfx10 firmware loading

Browse source 
refine gfx10 firmware loading

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yang Wang 2024-05-31 14:01:09 +08:00 • committed by Alex Deucher
parent 23fc94795b
commit 3af2c80ae2
1 changed files with 12 additions and 13 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

25
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
View file

@ -4116,7 +4116,6 @@ static void gfx_v10_0_check_gfxoff_flag(struct amdgpu_device *adev)
static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
{ {
char fw_name[53];
char ucode_prefix[30]; char ucode_prefix[30];
const char *wks = ""; const char *wks = "";
int err; int err;
@ -4131,27 +4130,27 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
wks = "_wks"; wks = "_wks";
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix)); amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp%s.bin", ucode_prefix, wks); err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw,
err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw, fw_name); "amdgpu/%s_pfp%s.bin", ucode_prefix, wks);
if (err) if (err)
goto out; goto out;
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP); amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_PFP);
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me%s.bin", ucode_prefix, wks); err = amdgpu_ucode_request(adev, &adev->gfx.me_fw,
err = amdgpu_ucode_request(adev, &adev->gfx.me_fw, fw_name); "amdgpu/%s_me%s.bin", ucode_prefix, wks);
if (err) if (err)
goto out; goto out;
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME); amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_ME);
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce%s.bin", ucode_prefix, wks); err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw,
err = amdgpu_ucode_request(adev, &adev->gfx.ce_fw, fw_name); "amdgpu/%s_ce%s.bin", ucode_prefix, wks);
if (err) if (err)
goto out; goto out;
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_CE); amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_CE);
if (!amdgpu_sriov_vf(adev)) { if (!amdgpu_sriov_vf(adev)) {
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix); err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); "amdgpu/%s_rlc.bin", ucode_prefix);
if (err) if (err)
goto out; goto out;
@ -4166,15 +4165,15 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
goto out; goto out;
} }
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", ucode_prefix, wks); err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw,
err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw, fw_name); "amdgpu/%s_mec%s.bin", ucode_prefix, wks);
if (err) if (err)
goto out; goto out;
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1); amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1);
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT); amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC1_JT);
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2%s.bin", ucode_prefix, wks); err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw,
err = amdgpu_ucode_request(adev, &adev->gfx.mec2_fw, fw_name); "amdgpu/%s_mec2%s.bin", ucode_prefix, wks);
if (!err) { if (!err) {
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2); amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);
amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT); amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT);