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Merge patch "riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y"

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This is a single fix, but it conflicts with some recent features.  I'm
merging it on top of the commit it fixes to ease backporting.

* b4-shazam-merge:
  riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y

Link: https://lore.kernel.org/r/20220922060958.44203-1-samuel@sholland.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Palmer Dabbelt 2023-01-31 21:55:43 -08:00
commit 3c349eacc5
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GPG key ID: 2E1319F35FBB1889
2 changed files with 12 additions and 19 deletions
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3
arch/riscv/include/asm/hwcap.h
View file

@ -70,7 +70,6 @@ static_assert(RISCV_ISA_EXT_ID_MAX <= RISCV_ISA_EXT_MAX);
*/ */
enum riscv_isa_ext_key { enum riscv_isa_ext_key {
RISCV_ISA_EXT_KEY_FPU, /* For 'F' and 'D' */ RISCV_ISA_EXT_KEY_FPU, /* For 'F' and 'D' */
RISCV_ISA_EXT_KEY_ZIHINTPAUSE,
RISCV_ISA_EXT_KEY_SVINVAL, RISCV_ISA_EXT_KEY_SVINVAL,
RISCV_ISA_EXT_KEY_MAX, RISCV_ISA_EXT_KEY_MAX,
}; };
@ -91,8 +90,6 @@ static __always_inline int riscv_isa_ext2key(int num)
return RISCV_ISA_EXT_KEY_FPU; return RISCV_ISA_EXT_KEY_FPU;
case RISCV_ISA_EXT_d: case RISCV_ISA_EXT_d:
return RISCV_ISA_EXT_KEY_FPU; return RISCV_ISA_EXT_KEY_FPU;
case RISCV_ISA_EXT_ZIHINTPAUSE:
return RISCV_ISA_EXT_KEY_ZIHINTPAUSE;
case RISCV_ISA_EXT_SVINVAL: case RISCV_ISA_EXT_SVINVAL:
return RISCV_ISA_EXT_KEY_SVINVAL; return RISCV_ISA_EXT_KEY_SVINVAL;
default: default:

28
arch/riscv/include/asm/vdso/processor.h
View file

@ -4,30 +4,26 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <linux/jump_label.h>
#include <asm/barrier.h> #include <asm/barrier.h>
#include <asm/hwcap.h>
static inline void cpu_relax(void) static inline void cpu_relax(void)
{ {
if (!static_branch_likely(&riscv_isa_ext_keys[RISCV_ISA_EXT_KEY_ZIHINTPAUSE])) {
#ifdef __riscv_muldiv #ifdef __riscv_muldiv
int dummy; int dummy;
/* In lieu of a halt instruction, induce a long-latency stall. */ /* In lieu of a halt instruction, induce a long-latency stall. */
__asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy)); __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy));
#endif #endif
} else {
/* #ifdef __riscv_zihintpause
* Reduce instruction retirement. /*
* This assumes the PC changes. * Reduce instruction retirement.
*/ * This assumes the PC changes.
#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE */
__asm__ __volatile__ ("pause"); __asm__ __volatile__ ("pause");
#else #else
/* Encoding of the pause instruction */ /* Encoding of the pause instruction */
__asm__ __volatile__ (".4byte 0x100000F"); __asm__ __volatile__ (".4byte 0x100000F");
#endif #endif
}
barrier(); barrier();
} }