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mirror of synced 2025-03-06 20:59:54 +01:00

drm/amd/display: Add a check for idle power optimization

[why]
Need a helper function to check idle power is allowed
so that dc doesn't access any registers that are power-gated.

[how]
Implement helper function to check idle power optimization.
Enable a hook to check if detection is allowed.

Signed-off-by: Sung Joon Kim <Sungjoon.Kim@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sung Joon Kim 2023-09-24 12:34:11 -04:00 committed by Alex Deucher
parent 05b78277ef
commit 434cf7af49
3 changed files with 21 additions and 1 deletions

View file

@ -4803,7 +4803,8 @@ bool dc_set_psr_allow_active(struct dc *dc, bool enable)
void dc_allow_idle_optimizations(struct dc *dc, bool allow)
{
if (dc->debug.disable_idle_power_optimizations)
if (dc->debug.disable_idle_power_optimizations ||
(dc->caps.ips_support && dc->config.disable_ips))
return;
if (dc->clk_mgr != NULL && dc->clk_mgr->funcs->is_smu_present)
@ -4817,6 +4818,23 @@ void dc_allow_idle_optimizations(struct dc *dc, bool allow)
dc->idle_optimizations_allowed = allow;
}
bool dc_is_idle_power_optimized(struct dc *dc)
{
uint32_t idle_state = 0;
if (dc->debug.disable_idle_power_optimizations)
return false;
if (dc->hwss.get_idle_state)
idle_state = dc->hwss.get_idle_state(dc);
if ((idle_state & DMUB_IPS1_ALLOW_MASK) ||
(idle_state & DMUB_IPS2_ALLOW_MASK))
return true;
return false;
}
/* set min and max memory clock to lowest and highest DPM level, respectively */
void dc_unlock_memory_clock_frequency(struct dc *dc)
{

View file

@ -2311,6 +2311,7 @@ bool dc_is_plane_eligible_for_idle_optimizations(struct dc *dc, struct dc_plane_
struct dc_cursor_attributes *cursor_attr);
void dc_allow_idle_optimizations(struct dc *dc, bool allow);
bool dc_is_idle_power_optimized(struct dc *dc);
/* set min and max memory clock to lowest and highest DPM level, respectively */
void dc_unlock_memory_clock_frequency(struct dc *dc);

View file

@ -352,6 +352,7 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
funcs->init_reg_offsets = dmub_srv_dcn35_regs_init;
funcs->is_hw_powered_up = dmub_dcn35_is_hw_powered_up;
funcs->should_detect = dmub_dcn35_should_detect;
break;
default: