rtw88: unify prefixes for tx power setting routine
Rename the function names to make them have the same prefix "rtw_phy" for the tx power setting routines. Only the function names and corresponding identation are modified. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
parent
226746fd12
commit
43712199e0
3 changed files with 66 additions and 66 deletions
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@ -1047,7 +1047,7 @@ static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
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rtw_phy_setup_phy_cond(rtwdev, 0);
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rtw_phy_setup_phy_cond(rtwdev, 0);
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rtw_hw_init_tx_power(hal);
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rtw_phy_init_tx_power(hal);
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rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
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rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
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rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
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rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
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rtw_phy_tx_power_by_rate_config(hal);
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rtw_phy_tx_power_by_rate_config(hal);
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@ -779,9 +779,9 @@ static u8 tbl_to_dec_pwr_by_rate(struct rtw_dev *rtwdev, u32 hex, u8 i)
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return (hex >> (i * 8)) & 0xFF;
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return (hex >> (i * 8)) & 0xFF;
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}
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}
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static void phy_get_rate_values_of_txpwr_by_rate(struct rtw_dev *rtwdev,
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static void
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u32 addr, u32 mask,
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rtw_phy_get_rate_values_of_txpwr_by_rate(struct rtw_dev *rtwdev,
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u32 val, u8 *rate,
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u32 addr, u32 mask, u32 val, u8 *rate,
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u8 *pwr_by_rate, u8 *rate_num)
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u8 *pwr_by_rate, u8 *rate_num)
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{
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{
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int i;
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int i;
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@ -1084,7 +1084,7 @@ static void phy_get_rate_values_of_txpwr_by_rate(struct rtw_dev *rtwdev,
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}
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}
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}
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}
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static void phy_store_tx_power_by_rate(struct rtw_dev *rtwdev,
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static void rtw_phy_store_tx_power_by_rate(struct rtw_dev *rtwdev,
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u32 band, u32 rfpath, u32 txnum,
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u32 band, u32 rfpath, u32 txnum,
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u32 regaddr, u32 bitmask, u32 data)
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u32 regaddr, u32 bitmask, u32 data)
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{
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{
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@ -1096,7 +1096,7 @@ static void phy_store_tx_power_by_rate(struct rtw_dev *rtwdev,
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s8 pwr_by_rate[RTW_RF_PATH_MAX] = {0};
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s8 pwr_by_rate[RTW_RF_PATH_MAX] = {0};
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int i;
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int i;
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phy_get_rate_values_of_txpwr_by_rate(rtwdev, regaddr, bitmask, data,
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rtw_phy_get_rate_values_of_txpwr_by_rate(rtwdev, regaddr, bitmask, data,
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rates, pwr_by_rate, &rate_num);
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rates, pwr_by_rate, &rate_num);
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if (WARN_ON(rfpath >= RTW_RF_PATH_MAX ||
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if (WARN_ON(rfpath >= RTW_RF_PATH_MAX ||
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@ -1128,7 +1128,7 @@ void rtw_parse_tbl_bb_pg(struct rtw_dev *rtwdev, const struct rtw_table *tbl)
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msleep(50);
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msleep(50);
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continue;
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continue;
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}
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}
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phy_store_tx_power_by_rate(rtwdev, p->band, p->rf_path,
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rtw_phy_store_tx_power_by_rate(rtwdev, p->band, p->rf_path,
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p->tx_num, p->addr, p->bitmask,
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p->tx_num, p->addr, p->bitmask,
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p->data);
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p->data);
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}
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}
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@ -1166,7 +1166,7 @@ static int rtw_channel_to_idx(u8 band, u8 channel)
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return ch_idx;
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return ch_idx;
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}
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}
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static void phy_set_tx_power_limit(struct rtw_dev *rtwdev, u8 regd, u8 band,
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static void rtw_phy_set_tx_power_limit(struct rtw_dev *rtwdev, u8 regd, u8 band,
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u8 bw, u8 rs, u8 ch, s8 pwr_limit)
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u8 bw, u8 rs, u8 ch, s8 pwr_limit)
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{
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{
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struct rtw_hal *hal = &rtwdev->hal;
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struct rtw_hal *hal = &rtwdev->hal;
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@ -1199,9 +1199,8 @@ void rtw_parse_tbl_txpwr_lmt(struct rtw_dev *rtwdev,
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BUILD_BUG_ON(sizeof(struct txpwr_lmt_cfg_pair) != sizeof(u8) * 6);
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BUILD_BUG_ON(sizeof(struct txpwr_lmt_cfg_pair) != sizeof(u8) * 6);
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for (; p < end; p++) {
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for (; p < end; p++) {
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phy_set_tx_power_limit(rtwdev, p->regd, p->band,
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rtw_phy_set_tx_power_limit(rtwdev, p->regd, p->band,
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p->bw, p->rs,
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p->bw, p->rs, p->ch, p->txpwr_lmt);
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p->ch, p->txpwr_lmt);
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}
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}
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}
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}
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@ -1366,7 +1365,7 @@ static u8 rtw_get_channel_group(u8 channel)
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}
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}
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}
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}
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static u8 phy_get_2g_tx_power_index(struct rtw_dev *rtwdev,
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static u8 rtw_phy_get_2g_tx_power_index(struct rtw_dev *rtwdev,
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struct rtw_2g_txpwr_idx *pwr_idx_2g,
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struct rtw_2g_txpwr_idx *pwr_idx_2g,
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enum rtw_bandwidth bandwidth,
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enum rtw_bandwidth bandwidth,
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u8 rate, u8 group)
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u8 rate, u8 group)
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@ -1413,7 +1412,7 @@ static u8 phy_get_2g_tx_power_index(struct rtw_dev *rtwdev,
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return tx_power;
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return tx_power;
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}
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}
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static u8 phy_get_5g_tx_power_index(struct rtw_dev *rtwdev,
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static u8 rtw_phy_get_5g_tx_power_index(struct rtw_dev *rtwdev,
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struct rtw_5g_txpwr_idx *pwr_idx_5g,
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struct rtw_5g_txpwr_idx *pwr_idx_5g,
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enum rtw_bandwidth bandwidth,
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enum rtw_bandwidth bandwidth,
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u8 rate, u8 group)
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u8 rate, u8 group)
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@ -1467,7 +1466,8 @@ static u8 phy_get_5g_tx_power_index(struct rtw_dev *rtwdev,
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return tx_power;
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return tx_power;
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}
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}
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static s8 get_tx_power_limit(struct rtw_hal *hal, u8 bw, u8 rs, u8 ch, u8 regd)
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static s8 __rtw_phy_get_tx_power_limit(struct rtw_hal *hal,
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u8 bw, u8 rs, u8 ch, u8 regd)
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{
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{
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if (regd > RTW_REGD_WW)
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if (regd > RTW_REGD_WW)
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return RTW_MAX_POWER_INDEX;
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return RTW_MAX_POWER_INDEX;
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@ -1475,7 +1475,7 @@ static s8 get_tx_power_limit(struct rtw_hal *hal, u8 bw, u8 rs, u8 ch, u8 regd)
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return hal->tx_pwr_limit_2g[regd][bw][rs][ch];
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return hal->tx_pwr_limit_2g[regd][bw][rs][ch];
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}
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}
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static s8 phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band,
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static s8 rtw_phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band,
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enum rtw_bandwidth bw, u8 rf_path,
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enum rtw_bandwidth bw, u8 rf_path,
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u8 rate, u8 channel, u8 regd)
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u8 rate, u8 channel, u8 regd)
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{
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{
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@ -1503,7 +1503,7 @@ static s8 phy_get_tx_power_limit(struct rtw_dev *rtwdev, u8 band,
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if (ch_idx < 0)
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if (ch_idx < 0)
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goto err;
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goto err;
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power_limit = get_tx_power_limit(hal, bw, rs, ch_idx, regd);
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power_limit = __rtw_phy_get_tx_power_limit(hal, bw, rs, ch_idx, regd);
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return power_limit;
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return power_limit;
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@ -1513,8 +1513,8 @@ err:
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return RTW_MAX_POWER_INDEX;
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return RTW_MAX_POWER_INDEX;
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}
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}
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static
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static u8
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u8 phy_get_tx_power_index(struct rtw_dev *rtwdev, u8 rf_path, u8 rate,
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rtw_phy_get_tx_power_index(struct rtw_dev *rtwdev, u8 rf_path, u8 rate,
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enum rtw_bandwidth bandwidth, u8 channel, u8 regd)
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enum rtw_bandwidth bandwidth, u8 channel, u8 regd)
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{
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{
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struct rtw_hal *hal = &rtwdev->hal;
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struct rtw_hal *hal = &rtwdev->hal;
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@ -1530,19 +1530,19 @@ u8 phy_get_tx_power_index(struct rtw_dev *rtwdev, u8 rf_path, u8 rate,
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/* base power index for 2.4G/5G */
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/* base power index for 2.4G/5G */
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if (channel <= 14) {
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if (channel <= 14) {
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band = PHY_BAND_2G;
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band = PHY_BAND_2G;
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tx_power = phy_get_2g_tx_power_index(rtwdev,
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tx_power = rtw_phy_get_2g_tx_power_index(rtwdev,
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&pwr_idx->pwr_idx_2g,
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&pwr_idx->pwr_idx_2g,
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bandwidth, rate, group);
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bandwidth, rate, group);
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offset = hal->tx_pwr_by_rate_offset_2g[rf_path][rate];
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offset = hal->tx_pwr_by_rate_offset_2g[rf_path][rate];
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} else {
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} else {
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band = PHY_BAND_5G;
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band = PHY_BAND_5G;
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tx_power = phy_get_5g_tx_power_index(rtwdev,
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tx_power = rtw_phy_get_5g_tx_power_index(rtwdev,
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&pwr_idx->pwr_idx_5g,
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&pwr_idx->pwr_idx_5g,
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bandwidth, rate, group);
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bandwidth, rate, group);
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offset = hal->tx_pwr_by_rate_offset_5g[rf_path][rate];
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offset = hal->tx_pwr_by_rate_offset_5g[rf_path][rate];
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}
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}
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limit = phy_get_tx_power_limit(rtwdev, band, bandwidth, rf_path,
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limit = rtw_phy_get_tx_power_limit(rtwdev, band, bandwidth, rf_path,
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rate, channel, regd);
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rate, channel, regd);
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if (offset > limit)
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if (offset > limit)
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@ -1556,7 +1556,7 @@ u8 phy_get_tx_power_index(struct rtw_dev *rtwdev, u8 rf_path, u8 rate,
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return tx_power;
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return tx_power;
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}
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}
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static void phy_set_tx_power_index_by_rs(struct rtw_dev *rtwdev,
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static void rtw_phy_set_tx_power_index_by_rs(struct rtw_dev *rtwdev,
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u8 ch, u8 path, u8 rs)
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u8 ch, u8 path, u8 rs)
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{
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{
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struct rtw_hal *hal = &rtwdev->hal;
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struct rtw_hal *hal = &rtwdev->hal;
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@ -1576,8 +1576,8 @@ static void phy_set_tx_power_index_by_rs(struct rtw_dev *rtwdev,
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bw = hal->current_band_width;
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bw = hal->current_band_width;
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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rate = rates[i];
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rate = rates[i];
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pwr_idx = phy_get_tx_power_index(rtwdev, path, rate, bw, ch,
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pwr_idx = rtw_phy_get_tx_power_index(rtwdev, path, rate,
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regd);
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bw, ch, regd);
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hal->tx_pwr_tbl[path][rate] = pwr_idx;
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hal->tx_pwr_tbl[path][rate] = pwr_idx;
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}
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}
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}
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}
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@ -1587,8 +1587,8 @@ static void phy_set_tx_power_index_by_rs(struct rtw_dev *rtwdev,
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* power index into a four-byte power index register, and calls set_tx_agc to
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* power index into a four-byte power index register, and calls set_tx_agc to
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* write these values into hardware
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* write these values into hardware
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*/
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*/
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static
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static void rtw_phy_set_tx_power_level_by_path(struct rtw_dev *rtwdev,
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void phy_set_tx_power_level_by_path(struct rtw_dev *rtwdev, u8 ch, u8 path)
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u8 ch, u8 path)
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{
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{
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struct rtw_hal *hal = &rtwdev->hal;
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struct rtw_hal *hal = &rtwdev->hal;
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u8 rs;
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u8 rs;
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@ -1600,7 +1600,7 @@ void phy_set_tx_power_level_by_path(struct rtw_dev *rtwdev, u8 ch, u8 path)
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rs = RTW_RATE_SECTION_OFDM;
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rs = RTW_RATE_SECTION_OFDM;
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for (; rs < RTW_RATE_SECTION_MAX; rs++)
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for (; rs < RTW_RATE_SECTION_MAX; rs++)
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phy_set_tx_power_index_by_rs(rtwdev, ch, path, rs);
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rtw_phy_set_tx_power_index_by_rs(rtwdev, ch, path, rs);
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}
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}
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void rtw_phy_set_tx_power_level(struct rtw_dev *rtwdev, u8 channel)
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void rtw_phy_set_tx_power_level(struct rtw_dev *rtwdev, u8 channel)
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@ -1612,14 +1612,14 @@ void rtw_phy_set_tx_power_level(struct rtw_dev *rtwdev, u8 channel)
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mutex_lock(&hal->tx_power_mutex);
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mutex_lock(&hal->tx_power_mutex);
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for (path = 0; path < hal->rf_path_num; path++)
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for (path = 0; path < hal->rf_path_num; path++)
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phy_set_tx_power_level_by_path(rtwdev, channel, path);
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rtw_phy_set_tx_power_level_by_path(rtwdev, channel, path);
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chip->ops->set_tx_power_index(rtwdev);
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chip->ops->set_tx_power_index(rtwdev);
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mutex_unlock(&hal->tx_power_mutex);
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mutex_unlock(&hal->tx_power_mutex);
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}
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}
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static
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static void
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void phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,
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rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,
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u8 rs, u8 size, u8 *rates)
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u8 rs, u8 size, u8 *rates)
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{
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{
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u8 rate;
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u8 rate;
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@ -1646,29 +1646,29 @@ void rtw_phy_tx_power_by_rate_config(struct rtw_hal *hal)
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u8 path;
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u8 path;
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for (path = 0; path < RTW_RF_PATH_MAX; path++) {
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for (path = 0; path < RTW_RF_PATH_MAX; path++) {
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phy_tx_power_by_rate_config_by_path(hal, path,
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rtw_phy_tx_power_by_rate_config_by_path(hal, path,
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RTW_RATE_SECTION_CCK,
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RTW_RATE_SECTION_CCK,
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rtw_cck_size, rtw_cck_rates);
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rtw_cck_size, rtw_cck_rates);
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phy_tx_power_by_rate_config_by_path(hal, path,
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rtw_phy_tx_power_by_rate_config_by_path(hal, path,
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RTW_RATE_SECTION_OFDM,
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RTW_RATE_SECTION_OFDM,
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rtw_ofdm_size, rtw_ofdm_rates);
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rtw_ofdm_size, rtw_ofdm_rates);
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phy_tx_power_by_rate_config_by_path(hal, path,
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rtw_phy_tx_power_by_rate_config_by_path(hal, path,
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RTW_RATE_SECTION_HT_1S,
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RTW_RATE_SECTION_HT_1S,
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rtw_ht_1s_size, rtw_ht_1s_rates);
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rtw_ht_1s_size, rtw_ht_1s_rates);
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phy_tx_power_by_rate_config_by_path(hal, path,
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rtw_phy_tx_power_by_rate_config_by_path(hal, path,
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RTW_RATE_SECTION_HT_2S,
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RTW_RATE_SECTION_HT_2S,
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rtw_ht_2s_size, rtw_ht_2s_rates);
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rtw_ht_2s_size, rtw_ht_2s_rates);
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phy_tx_power_by_rate_config_by_path(hal, path,
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rtw_phy_tx_power_by_rate_config_by_path(hal, path,
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RTW_RATE_SECTION_VHT_1S,
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RTW_RATE_SECTION_VHT_1S,
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rtw_vht_1s_size, rtw_vht_1s_rates);
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rtw_vht_1s_size, rtw_vht_1s_rates);
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phy_tx_power_by_rate_config_by_path(hal, path,
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rtw_phy_tx_power_by_rate_config_by_path(hal, path,
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RTW_RATE_SECTION_VHT_2S,
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RTW_RATE_SECTION_VHT_2S,
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rtw_vht_2s_size, rtw_vht_2s_rates);
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rtw_vht_2s_size, rtw_vht_2s_rates);
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}
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}
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}
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}
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static void
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static void
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phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)
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__rtw_phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)
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{
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{
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s8 base, orig;
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s8 base, orig;
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u8 ch;
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u8 ch;
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@ -1692,11 +1692,11 @@ void rtw_phy_tx_power_limit_config(struct rtw_hal *hal)
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for (regd = 0; regd < RTW_REGD_MAX; regd++)
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for (regd = 0; regd < RTW_REGD_MAX; regd++)
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for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
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for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
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for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
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for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
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phy_tx_power_limit_config(hal, regd, bw, rs);
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__rtw_phy_tx_power_limit_config(hal, regd, bw, rs);
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}
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}
|
||||||
|
|
||||||
static
|
static void rtw_phy_init_tx_power_limit(struct rtw_hal *hal,
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||||||
void rtw_hw_tx_power_limit_init(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)
|
u8 regd, u8 bw, u8 rs)
|
||||||
{
|
{
|
||||||
u8 ch;
|
u8 ch;
|
||||||
|
|
||||||
|
@ -1709,7 +1709,7 @@ void rtw_hw_tx_power_limit_init(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)
|
||||||
hal->tx_pwr_limit_5g[regd][bw][rs][ch] = RTW_MAX_POWER_INDEX;
|
hal->tx_pwr_limit_5g[regd][bw][rs][ch] = RTW_MAX_POWER_INDEX;
|
||||||
}
|
}
|
||||||
|
|
||||||
void rtw_hw_init_tx_power(struct rtw_hal *hal)
|
void rtw_phy_init_tx_power(struct rtw_hal *hal)
|
||||||
{
|
{
|
||||||
u8 regd, path, rate, rs, bw;
|
u8 regd, path, rate, rs, bw;
|
||||||
|
|
||||||
|
@ -1725,5 +1725,5 @@ void rtw_hw_init_tx_power(struct rtw_hal *hal)
|
||||||
for (regd = 0; regd < RTW_REGD_MAX; regd++)
|
for (regd = 0; regd < RTW_REGD_MAX; regd++)
|
||||||
for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
|
for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
|
||||||
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
|
for (rs = 0; rs < RTW_RATE_SECTION_MAX; rs++)
|
||||||
rtw_hw_tx_power_limit_init(hal, regd, bw, rs);
|
rtw_phy_init_tx_power_limit(hal, regd, bw, rs);
|
||||||
}
|
}
|
||||||
|
|
|
@ -41,7 +41,7 @@ void rtw_phy_cfg_bb(struct rtw_dev *rtwdev, const struct rtw_table *tbl,
|
||||||
u32 addr, u32 data);
|
u32 addr, u32 data);
|
||||||
void rtw_phy_cfg_rf(struct rtw_dev *rtwdev, const struct rtw_table *tbl,
|
void rtw_phy_cfg_rf(struct rtw_dev *rtwdev, const struct rtw_table *tbl,
|
||||||
u32 addr, u32 data);
|
u32 addr, u32 data);
|
||||||
void rtw_hw_init_tx_power(struct rtw_hal *hal);
|
void rtw_phy_init_tx_power(struct rtw_hal *hal);
|
||||||
void rtw_phy_load_tables(struct rtw_dev *rtwdev);
|
void rtw_phy_load_tables(struct rtw_dev *rtwdev);
|
||||||
void rtw_phy_set_tx_power_level(struct rtw_dev *rtwdev, u8 channel);
|
void rtw_phy_set_tx_power_level(struct rtw_dev *rtwdev, u8 channel);
|
||||||
void rtw_phy_tx_power_by_rate_config(struct rtw_hal *hal);
|
void rtw_phy_tx_power_by_rate_config(struct rtw_hal *hal);
|
||||||
|
|
Loading…
Add table
Reference in a new issue