staging/rdma/hfi1: move txreq header code
The patch separates the txreq defines into new files, one for verbs and one for sdma. The verbs_txreq implementation handles the setup and teardown of the txreq cache, so the register routine is changed to call the new init/exit routines. This patch allows for followup patches enhance the send engine. Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
parent
d2421a82f6
commit
45842abbb2
8 changed files with 384 additions and 188 deletions
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@ -11,7 +11,8 @@ hfi1-y := affinity.o chip.o device.o diag.o driver.o efivar.o \
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eprom.o file_ops.o firmware.o \
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eprom.o file_ops.o firmware.o \
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init.o intr.o mad.o pcie.o pio.o pio_copy.o platform.o \
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init.o intr.o mad.o pcie.o pio.o pio_copy.o platform.o \
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qp.o qsfp.o rc.o ruc.o sdma.o sysfs.o trace.o twsi.o \
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qp.o qsfp.o rc.o ruc.o sdma.o sysfs.o trace.o twsi.o \
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uc.o ud.o user_exp_rcv.o user_pages.o user_sdma.o verbs.o
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uc.o ud.o user_exp_rcv.o user_pages.o user_sdma.o verbs.o \
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verbs_txreq.o
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hfi1-$(CONFIG_DEBUG_FS) += debugfs.o
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hfi1-$(CONFIG_DEBUG_FS) += debugfs.o
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CFLAGS_trace.o = -I$(src)
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CFLAGS_trace.o = -I$(src)
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@ -60,7 +60,7 @@
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#include "hfi.h"
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#include "hfi.h"
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#include "qp.h"
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#include "qp.h"
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#include "trace.h"
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#include "trace.h"
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#include "sdma.h"
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#include "verbs_txreq.h"
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unsigned int hfi1_qp_table_size = 256;
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unsigned int hfi1_qp_table_size = 256;
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module_param_named(qp_table_size, hfi1_qp_table_size, uint, S_IRUGO);
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module_param_named(qp_table_size, hfi1_qp_table_size, uint, S_IRUGO);
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@ -53,7 +53,7 @@
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#include "hfi.h"
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#include "hfi.h"
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#include "mad.h"
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#include "mad.h"
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#include "qp.h"
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#include "qp.h"
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#include "sdma.h"
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#include "verbs_txreq.h"
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/*
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/*
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* Convert the AETH RNR timeout code into the number of microseconds.
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* Convert the AETH RNR timeout code into the number of microseconds.
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@ -58,9 +58,8 @@
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#include "hfi.h"
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#include "hfi.h"
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#include "verbs.h"
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#include "verbs.h"
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#include "sdma_txreq.h"
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/* increased for AHG */
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#define NUM_DESC 6
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/* Hardware limit */
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/* Hardware limit */
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#define MAX_DESC 64
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#define MAX_DESC 64
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/* Hardware limit for SDMA packet size */
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/* Hardware limit for SDMA packet size */
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@ -311,83 +310,6 @@ struct hw_sdma_desc {
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__le64 qw[2];
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__le64 qw[2];
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};
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};
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/*
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* struct sdma_desc - canonical fragment descriptor
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*
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* This is the descriptor carried in the tx request
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* corresponding to each fragment.
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*
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*/
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struct sdma_desc {
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/* private: don't use directly */
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u64 qw[2];
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};
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struct sdma_txreq;
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typedef void (*callback_t)(struct sdma_txreq *, int, int);
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/**
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* struct sdma_txreq - the sdma_txreq structure (one per packet)
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* @list: for use by user and by queuing for wait
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*
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* This is the representation of a packet which consists of some
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* number of fragments. Storage is provided to within the structure.
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* for all fragments.
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*
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* The storage for the descriptors are automatically extended as needed
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* when the currently allocation is exceeded.
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*
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* The user (Verbs or PSM) may overload this structure with fields
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* specific to their use by putting this struct first in their struct.
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* The method of allocation of the overloaded structure is user dependent
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*
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* The list is the only public field in the structure.
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*
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*/
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struct sdma_txreq {
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struct list_head list;
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/* private: */
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struct sdma_desc *descp;
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/* private: */
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void *coalesce_buf;
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/* private: */
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u16 coalesce_idx;
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/* private: */
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struct iowait *wait;
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/* private: */
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callback_t complete;
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#ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
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u64 sn;
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#endif
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/* private: - used in coalesce/pad processing */
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u16 packet_len;
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/* private: - down-counted to trigger last */
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u16 tlen;
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/* private: flags */
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u16 flags;
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/* private: */
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u16 num_desc;
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/* private: */
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u16 desc_limit;
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/* private: */
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u16 next_descq_idx;
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/* private: */
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struct sdma_desc descs[NUM_DESC];
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};
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struct verbs_txreq {
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struct hfi1_pio_header phdr;
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struct sdma_txreq txreq;
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struct rvt_qp *qp;
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struct rvt_swqe *wqe;
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struct rvt_mregion *mr;
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struct rvt_sge_state *ss;
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struct sdma_engine *sde;
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u16 hdr_dwords;
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u16 hdr_inx;
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};
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/**
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/**
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* struct sdma_engine - Data pertaining to each SDMA engine.
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* struct sdma_engine - Data pertaining to each SDMA engine.
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* @dd: a back-pointer to the device data
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* @dd: a back-pointer to the device data
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130
drivers/staging/rdma/hfi1/sdma_txreq.h
Normal file
130
drivers/staging/rdma/hfi1/sdma_txreq.h
Normal file
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@ -0,0 +1,130 @@
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/*
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* Copyright(c) 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef HFI1_SDMA_TXREQ_H
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#define HFI1_SDMA_TXREQ_H
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/* increased for AHG */
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#define NUM_DESC 6
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/*
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* struct sdma_desc - canonical fragment descriptor
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*
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* This is the descriptor carried in the tx request
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* corresponding to each fragment.
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*
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*/
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struct sdma_desc {
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/* private: don't use directly */
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u64 qw[2];
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};
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/**
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* struct sdma_txreq - the sdma_txreq structure (one per packet)
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* @list: for use by user and by queuing for wait
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*
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* This is the representation of a packet which consists of some
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* number of fragments. Storage is provided to within the structure.
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* for all fragments.
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*
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* The storage for the descriptors are automatically extended as needed
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* when the currently allocation is exceeded.
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*
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* The user (Verbs or PSM) may overload this structure with fields
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* specific to their use by putting this struct first in their struct.
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* The method of allocation of the overloaded structure is user dependent
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*
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* The list is the only public field in the structure.
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*
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*/
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#define SDMA_TXREQ_S_OK 0
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#define SDMA_TXREQ_S_SENDERROR 1
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#define SDMA_TXREQ_S_ABORTED 2
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#define SDMA_TXREQ_S_SHUTDOWN 3
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/* flags bits */
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#define SDMA_TXREQ_F_URGENT 0x0001
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#define SDMA_TXREQ_F_AHG_COPY 0x0002
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#define SDMA_TXREQ_F_USE_AHG 0x0004
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struct sdma_txreq;
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typedef void (*callback_t)(struct sdma_txreq *, int, int);
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struct iowait;
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struct sdma_txreq {
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struct list_head list;
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/* private: */
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struct sdma_desc *descp;
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/* private: */
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void *coalesce_buf;
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/* private: */
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struct iowait *wait;
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/* private: */
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callback_t complete;
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#ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
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u64 sn;
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#endif
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/* private: - used in coalesce/pad processing */
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u16 packet_len;
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/* private: - down-counted to trigger last */
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u16 tlen;
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/* private: */
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u16 num_desc;
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/* private: */
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u16 desc_limit;
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/* private: */
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u16 next_descq_idx;
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/* private: */
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u16 coalesce_idx;
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/* private: flags */
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u16 flags;
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/* private: */
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struct sdma_desc descs[NUM_DESC];
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};
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#endif /* HFI1_SDMA_TXREQ_H */
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@ -63,7 +63,7 @@
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#include "device.h"
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#include "device.h"
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#include "trace.h"
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#include "trace.h"
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#include "qp.h"
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#include "qp.h"
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#include "sdma.h"
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#include "verbs_txreq.h"
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static unsigned int hfi1_lkey_table_size = 16;
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static unsigned int hfi1_lkey_table_size = 16;
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module_param_named(lkey_table_size, hfi1_lkey_table_size, uint,
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module_param_named(lkey_table_size, hfi1_lkey_table_size, uint,
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@ -508,89 +508,6 @@ void update_sge(struct rvt_sge_state *ss, u32 length)
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}
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}
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}
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}
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static noinline struct verbs_txreq *__get_txreq(struct hfi1_ibdev *dev,
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struct rvt_qp *qp)
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{
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struct hfi1_qp_priv *priv = qp->priv;
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struct verbs_txreq *tx;
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unsigned long flags;
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tx = kmem_cache_alloc(dev->verbs_txreq_cache, GFP_ATOMIC);
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if (!tx) {
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spin_lock_irqsave(&qp->s_lock, flags);
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write_seqlock(&dev->iowait_lock);
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if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK &&
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list_empty(&priv->s_iowait.list)) {
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dev->n_txwait++;
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qp->s_flags |= RVT_S_WAIT_TX;
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list_add_tail(&priv->s_iowait.list, &dev->txwait);
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trace_hfi1_qpsleep(qp, RVT_S_WAIT_TX);
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atomic_inc(&qp->refcount);
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}
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qp->s_flags &= ~RVT_S_BUSY;
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write_sequnlock(&dev->iowait_lock);
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spin_unlock_irqrestore(&qp->s_lock, flags);
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tx = ERR_PTR(-EBUSY);
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}
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return tx;
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}
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static inline struct verbs_txreq *get_txreq(struct hfi1_ibdev *dev,
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struct rvt_qp *qp)
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{
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struct verbs_txreq *tx;
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tx = kmem_cache_alloc(dev->verbs_txreq_cache, GFP_ATOMIC);
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if (!tx) {
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/* call slow path to get the lock */
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tx = __get_txreq(dev, qp);
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if (IS_ERR(tx))
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return tx;
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}
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tx->qp = qp;
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return tx;
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}
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void hfi1_put_txreq(struct verbs_txreq *tx)
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{
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struct hfi1_ibdev *dev;
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struct rvt_qp *qp;
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unsigned long flags;
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unsigned int seq;
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struct hfi1_qp_priv *priv;
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qp = tx->qp;
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dev = to_idev(qp->ibqp.device);
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if (tx->mr) {
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rvt_put_mr(tx->mr);
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tx->mr = NULL;
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}
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sdma_txclean(dd_from_dev(dev), &tx->txreq);
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/* Free verbs_txreq and return to slab cache */
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kmem_cache_free(dev->verbs_txreq_cache, tx);
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do {
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seq = read_seqbegin(&dev->iowait_lock);
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if (!list_empty(&dev->txwait)) {
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struct iowait *wait;
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write_seqlock_irqsave(&dev->iowait_lock, flags);
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/* Wake up first QP wanting a free struct */
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wait = list_first_entry(&dev->txwait, struct iowait,
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list);
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qp = iowait_to_qp(wait);
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priv = qp->priv;
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list_del_init(&priv->s_iowait.list);
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/* refcount held until actual wake up */
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write_sequnlock_irqrestore(&dev->iowait_lock, flags);
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hfi1_qp_wakeup(qp, RVT_S_WAIT_TX);
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break;
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}
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} while (read_seqretry(&dev->iowait_lock, seq));
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}
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/*
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/*
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* This is called with progress side lock held.
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* This is called with progress side lock held.
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*/
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*/
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@ -1427,13 +1344,6 @@ static void init_ibport(struct hfi1_pportdata *ppd)
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RCU_INIT_POINTER(ibp->rvp.qp[1], NULL);
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RCU_INIT_POINTER(ibp->rvp.qp[1], NULL);
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}
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}
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|
|
||||||
static void verbs_txreq_kmem_cache_ctor(void *obj)
|
|
||||||
{
|
|
||||||
struct verbs_txreq *tx = obj;
|
|
||||||
|
|
||||||
memset(tx, 0, sizeof(*tx));
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* hfi1_register_ib_device - register our device with the infiniband core
|
* hfi1_register_ib_device - register our device with the infiniband core
|
||||||
* @dd: the device data structure
|
* @dd: the device data structure
|
||||||
|
@ -1447,8 +1357,6 @@ int hfi1_register_ib_device(struct hfi1_devdata *dd)
|
||||||
unsigned i;
|
unsigned i;
|
||||||
int ret;
|
int ret;
|
||||||
size_t lcpysz = IB_DEVICE_NAME_MAX;
|
size_t lcpysz = IB_DEVICE_NAME_MAX;
|
||||||
u16 descq_cnt;
|
|
||||||
char buf[TXREQ_NAME_LEN];
|
|
||||||
|
|
||||||
for (i = 0; i < dd->num_pports; i++)
|
for (i = 0; i < dd->num_pports; i++)
|
||||||
init_ibport(ppd + i);
|
init_ibport(ppd + i);
|
||||||
|
@ -1461,18 +1369,9 @@ int hfi1_register_ib_device(struct hfi1_devdata *dd)
|
||||||
INIT_LIST_HEAD(&dev->txwait);
|
INIT_LIST_HEAD(&dev->txwait);
|
||||||
INIT_LIST_HEAD(&dev->memwait);
|
INIT_LIST_HEAD(&dev->memwait);
|
||||||
|
|
||||||
descq_cnt = sdma_get_descq_cnt();
|
ret = verbs_txreq_init(dev);
|
||||||
|
if (ret)
|
||||||
snprintf(buf, sizeof(buf), "hfi1_%u_vtxreq_cache", dd->unit);
|
|
||||||
/* SLAB_HWCACHE_ALIGN for AHG */
|
|
||||||
dev->verbs_txreq_cache = kmem_cache_create(buf,
|
|
||||||
sizeof(struct verbs_txreq),
|
|
||||||
0, SLAB_HWCACHE_ALIGN,
|
|
||||||
verbs_txreq_kmem_cache_ctor);
|
|
||||||
if (!dev->verbs_txreq_cache) {
|
|
||||||
ret = -ENOMEM;
|
|
||||||
goto err_verbs_txreq;
|
goto err_verbs_txreq;
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* The system image GUID is supposed to be the same for all
|
* The system image GUID is supposed to be the same for all
|
||||||
|
@ -1578,7 +1477,7 @@ int hfi1_register_ib_device(struct hfi1_devdata *dd)
|
||||||
err_class:
|
err_class:
|
||||||
rvt_unregister_device(&dd->verbs_dev.rdi);
|
rvt_unregister_device(&dd->verbs_dev.rdi);
|
||||||
err_verbs_txreq:
|
err_verbs_txreq:
|
||||||
kmem_cache_destroy(dev->verbs_txreq_cache);
|
verbs_txreq_exit(dev);
|
||||||
dd_dev_err(dd, "cannot register verbs: %d!\n", -ret);
|
dd_dev_err(dd, "cannot register verbs: %d!\n", -ret);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -1597,7 +1496,7 @@ void hfi1_unregister_ib_device(struct hfi1_devdata *dd)
|
||||||
dd_dev_err(dd, "memwait list not empty!\n");
|
dd_dev_err(dd, "memwait list not empty!\n");
|
||||||
|
|
||||||
del_timer_sync(&dev->mem_timer);
|
del_timer_sync(&dev->mem_timer);
|
||||||
kmem_cache_destroy(dev->verbs_txreq_cache);
|
verbs_txreq_exit(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
void hfi1_cnp_rcv(struct hfi1_packet *packet)
|
void hfi1_cnp_rcv(struct hfi1_packet *packet)
|
||||||
|
|
149
drivers/staging/rdma/hfi1/verbs_txreq.c
Normal file
149
drivers/staging/rdma/hfi1/verbs_txreq.c
Normal file
|
@ -0,0 +1,149 @@
|
||||||
|
/*
|
||||||
|
* Copyright(c) 2016 Intel Corporation.
|
||||||
|
*
|
||||||
|
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||||
|
* redistributing this file, you may do so under either license.
|
||||||
|
*
|
||||||
|
* GPL LICENSE SUMMARY
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
* General Public License for more details.
|
||||||
|
*
|
||||||
|
* BSD LICENSE
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* - Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* - Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* - Neither the name of Intel Corporation nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "hfi.h"
|
||||||
|
#include "verbs_txreq.h"
|
||||||
|
#include "qp.h"
|
||||||
|
#include "trace.h"
|
||||||
|
|
||||||
|
#define TXREQ_LEN 24
|
||||||
|
|
||||||
|
void hfi1_put_txreq(struct verbs_txreq *tx)
|
||||||
|
{
|
||||||
|
struct hfi1_ibdev *dev;
|
||||||
|
struct rvt_qp *qp;
|
||||||
|
unsigned long flags;
|
||||||
|
unsigned int seq;
|
||||||
|
struct hfi1_qp_priv *priv;
|
||||||
|
|
||||||
|
qp = tx->qp;
|
||||||
|
dev = to_idev(qp->ibqp.device);
|
||||||
|
|
||||||
|
if (tx->mr)
|
||||||
|
rvt_put_mr(tx->mr);
|
||||||
|
|
||||||
|
sdma_txclean(dd_from_dev(dev), &tx->txreq);
|
||||||
|
|
||||||
|
/* Free verbs_txreq and return to slab cache */
|
||||||
|
kmem_cache_free(dev->verbs_txreq_cache, tx);
|
||||||
|
|
||||||
|
do {
|
||||||
|
seq = read_seqbegin(&dev->iowait_lock);
|
||||||
|
if (!list_empty(&dev->txwait)) {
|
||||||
|
struct iowait *wait;
|
||||||
|
|
||||||
|
write_seqlock_irqsave(&dev->iowait_lock, flags);
|
||||||
|
wait = list_first_entry(&dev->txwait, struct iowait,
|
||||||
|
list);
|
||||||
|
qp = iowait_to_qp(wait);
|
||||||
|
priv = qp->priv;
|
||||||
|
list_del_init(&priv->s_iowait.list);
|
||||||
|
/* refcount held until actual wake up */
|
||||||
|
write_sequnlock_irqrestore(&dev->iowait_lock, flags);
|
||||||
|
hfi1_qp_wakeup(qp, RVT_S_WAIT_TX);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
} while (read_seqretry(&dev->iowait_lock, seq));
|
||||||
|
}
|
||||||
|
|
||||||
|
struct verbs_txreq *__get_txreq(struct hfi1_ibdev *dev,
|
||||||
|
struct rvt_qp *qp)
|
||||||
|
{
|
||||||
|
struct verbs_txreq *tx = ERR_PTR(-EBUSY);
|
||||||
|
unsigned long flags;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&qp->s_lock, flags);
|
||||||
|
write_seqlock(&dev->iowait_lock);
|
||||||
|
if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
|
||||||
|
struct hfi1_qp_priv *priv;
|
||||||
|
|
||||||
|
tx = kmem_cache_alloc(dev->verbs_txreq_cache, GFP_ATOMIC);
|
||||||
|
if (tx)
|
||||||
|
goto out;
|
||||||
|
priv = qp->priv;
|
||||||
|
if (list_empty(&priv->s_iowait.list)) {
|
||||||
|
dev->n_txwait++;
|
||||||
|
qp->s_flags |= RVT_S_WAIT_TX;
|
||||||
|
list_add_tail(&priv->s_iowait.list, &dev->txwait);
|
||||||
|
trace_hfi1_qpsleep(qp, RVT_S_WAIT_TX);
|
||||||
|
atomic_inc(&qp->refcount);
|
||||||
|
}
|
||||||
|
qp->s_flags &= ~RVT_S_BUSY;
|
||||||
|
}
|
||||||
|
out:
|
||||||
|
write_sequnlock(&dev->iowait_lock);
|
||||||
|
spin_unlock_irqrestore(&qp->s_lock, flags);
|
||||||
|
return tx;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void verbs_txreq_kmem_cache_ctor(void *obj)
|
||||||
|
{
|
||||||
|
struct verbs_txreq *tx = (struct verbs_txreq *)obj;
|
||||||
|
|
||||||
|
memset(tx, 0, sizeof(*tx));
|
||||||
|
}
|
||||||
|
|
||||||
|
int verbs_txreq_init(struct hfi1_ibdev *dev)
|
||||||
|
{
|
||||||
|
char buf[TXREQ_LEN];
|
||||||
|
struct hfi1_devdata *dd = dd_from_dev(dev);
|
||||||
|
|
||||||
|
snprintf(buf, sizeof(buf), "hfi1_%u_vtxreq_cache", dd->unit);
|
||||||
|
dev->verbs_txreq_cache = kmem_cache_create(buf,
|
||||||
|
sizeof(struct verbs_txreq),
|
||||||
|
0, SLAB_HWCACHE_ALIGN,
|
||||||
|
verbs_txreq_kmem_cache_ctor);
|
||||||
|
if (!dev->verbs_txreq_cache)
|
||||||
|
return -ENOMEM;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void verbs_txreq_exit(struct hfi1_ibdev *dev)
|
||||||
|
{
|
||||||
|
kmem_cache_destroy(dev->verbs_txreq_cache);
|
||||||
|
dev->verbs_txreq_cache = NULL;
|
||||||
|
}
|
95
drivers/staging/rdma/hfi1/verbs_txreq.h
Normal file
95
drivers/staging/rdma/hfi1/verbs_txreq.h
Normal file
|
@ -0,0 +1,95 @@
|
||||||
|
/*
|
||||||
|
* Copyright(c) 2016 Intel Corporation.
|
||||||
|
*
|
||||||
|
* This file is provided under a dual BSD/GPLv2 license. When using or
|
||||||
|
* redistributing this file, you may do so under either license.
|
||||||
|
*
|
||||||
|
* GPL LICENSE SUMMARY
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but
|
||||||
|
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
* General Public License for more details.
|
||||||
|
*
|
||||||
|
* BSD LICENSE
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* - Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* - Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* - Neither the name of Intel Corporation nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HFI1_VERBS_TXREQ_H
|
||||||
|
#define HFI1_VERBS_TXREQ_H
|
||||||
|
|
||||||
|
#include <linux/types.h>
|
||||||
|
#include <linux/slab.h>
|
||||||
|
|
||||||
|
#include "verbs.h"
|
||||||
|
#include "sdma_txreq.h"
|
||||||
|
#include "iowait.h"
|
||||||
|
|
||||||
|
struct verbs_txreq {
|
||||||
|
struct hfi1_pio_header phdr;
|
||||||
|
struct sdma_txreq txreq;
|
||||||
|
struct rvt_qp *qp;
|
||||||
|
struct rvt_swqe *wqe;
|
||||||
|
struct rvt_mregion *mr;
|
||||||
|
struct rvt_sge_state *ss;
|
||||||
|
struct sdma_engine *sde;
|
||||||
|
struct send_context *psc;
|
||||||
|
u16 hdr_dwords;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct hfi1_ibdev;
|
||||||
|
struct verbs_txreq *__get_txreq(struct hfi1_ibdev *dev,
|
||||||
|
struct rvt_qp *qp);
|
||||||
|
|
||||||
|
static inline struct verbs_txreq *get_txreq(struct hfi1_ibdev *dev,
|
||||||
|
struct rvt_qp *qp)
|
||||||
|
{
|
||||||
|
struct verbs_txreq *tx;
|
||||||
|
|
||||||
|
tx = kmem_cache_alloc(dev->verbs_txreq_cache, GFP_ATOMIC);
|
||||||
|
if (unlikely(!tx)) {
|
||||||
|
/* call slow path to get the lock */
|
||||||
|
tx = __get_txreq(dev, qp);
|
||||||
|
if (IS_ERR(tx))
|
||||||
|
return tx;
|
||||||
|
}
|
||||||
|
tx->qp = qp;
|
||||||
|
tx->mr = NULL;
|
||||||
|
return tx;
|
||||||
|
}
|
||||||
|
|
||||||
|
void hfi1_put_txreq(struct verbs_txreq *tx);
|
||||||
|
int verbs_txreq_init(struct hfi1_ibdev *dev);
|
||||||
|
void verbs_txreq_exit(struct hfi1_ibdev *dev);
|
||||||
|
|
||||||
|
#endif /* HFI1_VERBS_TXREQ_H */
|
Loading…
Add table
Reference in a new issue