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net/mlx5e: Allow profile-specific limitation on max num of channels

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Let SF/VF representor's netdev use profile-specific limitation on
max_nch to reduce its memory and HW resources consumption.

This is particularly important for environments with limited memory
and high number of SFs.

Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Vu Pham <vuhuong@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Tariq Toukan 2021-09-29 17:29:24 +03:00 • committed by Saeed Mahameed
parent 0246a57ab5
commit 473baf2e9e
3 changed files with 23 additions and 3 deletions
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1
drivers/net/ethernet/mellanox/mlx5/core/en.h
View file

@ -972,6 +972,7 @@ struct mlx5e_profile {
int (*update_rx)(struct mlx5e_priv *priv); int (*update_rx)(struct mlx5e_priv *priv);
void (*update_stats)(struct mlx5e_priv *priv); void (*update_stats)(struct mlx5e_priv *priv);
void (*update_carrier)(struct mlx5e_priv *priv); void (*update_carrier)(struct mlx5e_priv *priv);
int (*max_nch_limit)(struct mlx5_core_dev *mdev);
unsigned int (*stats_grps_num)(struct mlx5e_priv *priv); unsigned int (*stats_grps_num)(struct mlx5e_priv *priv);
mlx5e_stats_grp_t *stats_grps; mlx5e_stats_grp_t *stats_grps;
const struct mlx5e_rx_handlers *rx_handlers; const struct mlx5e_rx_handlers *rx_handlers;

18
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
View file

@ -5098,6 +5098,18 @@ static const struct mlx5e_profile mlx5e_nic_profile = {
BIT(MLX5E_PROFILE_FEATURE_QOS_HTB), BIT(MLX5E_PROFILE_FEATURE_QOS_HTB),
}; };
static int mlx5e_profile_max_num_channels(struct mlx5_core_dev *mdev,
const struct mlx5e_profile *profile)
{
int nch;
nch = mlx5e_get_max_num_channels(mdev);
if (profile->max_nch_limit)
nch = min_t(int, nch, profile->max_nch_limit(mdev));
return nch;
}
static unsigned int static unsigned int
mlx5e_calc_max_nch(struct mlx5_core_dev *mdev, struct net_device *netdev, mlx5e_calc_max_nch(struct mlx5_core_dev *mdev, struct net_device *netdev,
const struct mlx5e_profile *profile) const struct mlx5e_profile *profile)
@ -5106,7 +5118,7 @@ mlx5e_calc_max_nch(struct mlx5_core_dev *mdev, struct net_device *netdev,
unsigned int max_nch, tmp; unsigned int max_nch, tmp;
/* core resources */ /* core resources */
max_nch = mlx5e_get_max_num_channels(mdev); max_nch = mlx5e_profile_max_num_channels(mdev, profile);
/* netdev rx queues */ /* netdev rx queues */
tmp = netdev->num_rx_queues / max_t(u8, profile->rq_groups, 1); tmp = netdev->num_rx_queues / max_t(u8, profile->rq_groups, 1);
@ -5235,7 +5247,7 @@ static unsigned int mlx5e_get_max_num_txqs(struct mlx5_core_dev *mdev,
{ {
unsigned int nch, ptp_txqs, qos_txqs; unsigned int nch, ptp_txqs, qos_txqs;
nch = mlx5e_get_max_num_channels(mdev); nch = mlx5e_profile_max_num_channels(mdev, profile);
ptp_txqs = MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn) && ptp_txqs = MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn) &&
mlx5e_profile_feature_cap(profile, PTP_TX) ? mlx5e_profile_feature_cap(profile, PTP_TX) ?
@ -5253,7 +5265,7 @@ static unsigned int mlx5e_get_max_num_rxqs(struct mlx5_core_dev *mdev,
{ {
unsigned int nch; unsigned int nch;
nch = mlx5e_get_max_num_channels(mdev); nch = mlx5e_profile_max_num_channels(mdev, profile);
return nch * profile->rq_groups; return nch * profile->rq_groups;
} }

7
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
View file

@ -591,6 +591,12 @@ bool mlx5e_eswitch_vf_rep(const struct net_device *netdev)
return netdev->netdev_ops == &mlx5e_netdev_ops_rep; return netdev->netdev_ops == &mlx5e_netdev_ops_rep;
} }
static int mlx5e_rep_max_nch_limit(struct mlx5_core_dev *mdev)
{
return (1 << MLX5_CAP_GEN(mdev, log_max_tir)) /
mlx5_eswitch_get_total_vports(mdev);
}
static void mlx5e_build_rep_params(struct net_device *netdev) static void mlx5e_build_rep_params(struct net_device *netdev)
{ {
struct mlx5e_priv *priv = netdev_priv(netdev); struct mlx5e_priv *priv = netdev_priv(netdev);
@ -1113,6 +1119,7 @@ static const struct mlx5e_profile mlx5e_rep_profile = {
.rq_groups = MLX5E_NUM_RQ_GROUPS(REGULAR), .rq_groups = MLX5E_NUM_RQ_GROUPS(REGULAR),
.stats_grps = mlx5e_rep_stats_grps, .stats_grps = mlx5e_rep_stats_grps,
.stats_grps_num = mlx5e_rep_stats_grps_num, .stats_grps_num = mlx5e_rep_stats_grps_num,
.max_nch_limit = mlx5e_rep_max_nch_limit,
}; };
static const struct mlx5e_profile mlx5e_uplink_rep_profile = { static const struct mlx5e_profile mlx5e_uplink_rep_profile = {