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drm/edid: Split deep color modes between RGB and YUV444

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The current code assumes that the RGB444 and YUV444 formats are the
same, but the HDMI 2.0 specification states that:

   The three DC_XXbit bits above only indicate support for RGB 4:4:4 at
   that pixel size. Support for YCBCR 4:4:4 in Deep Color modes is
   indicated with the DC_Y444 bit. If DC_Y444 is set, then YCBCR 4:4:4
   is supported for all modes indicated by the DC_XXbit flags.

So if we have YUV444 support and any DC_XXbit flag set but the DC_Y444
flag isn't, we'll assume that we support that deep colour mode for
YUV444 which breaks the specification.

In order to fix this, let's split the edid_hdmi_dc_modes field in struct
drm_display_info into two fields, one for RGB444 and one for YUV444.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: d0c94692e0 ("drm/edid: Parse and handle HDMI deep color modes.")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220120151625.594595-4-maxime@cerno.tech
This commit is contained in:
Maxime Ripard 2022-01-20 16:16:12 +01:00
parent 75478b3b39
commit 4adc33f36d
No known key found for this signature in database
GPG key ID: E3EF0D6F671851C5
5 changed files with 17 additions and 10 deletions
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2
drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
View file

@ -175,7 +175,7 @@ int amdgpu_connector_get_monitor_bpc(struct drm_connector *connector)
/* Check if bpc is within clock limit. Try to degrade gracefully otherwise */ /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) { if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) && if ((connector->display_info.edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30) &&
(mode_clock * 5/4 <= max_tmds_clock)) (mode_clock * 5/4 <= max_tmds_clock))
bpc = 10; bpc = 10;
else else

7
drivers/gpu/drm/drm_edid.c
View file

@ -5086,21 +5086,21 @@ static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
if (hdmi[6] & DRM_EDID_HDMI_DC_30) { if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
dc_bpc = 10; dc_bpc = 10;
info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30; info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_30;
DRM_DEBUG("%s: HDMI sink does deep color 30.\n", DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
connector->name); connector->name);
} }
if (hdmi[6] & DRM_EDID_HDMI_DC_36) { if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
dc_bpc = 12; dc_bpc = 12;
info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36; info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_36;
DRM_DEBUG("%s: HDMI sink does deep color 36.\n", DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
connector->name); connector->name);
} }
if (hdmi[6] & DRM_EDID_HDMI_DC_48) { if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
dc_bpc = 16; dc_bpc = 16;
info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48; info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_48;
DRM_DEBUG("%s: HDMI sink does deep color 48.\n", DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
connector->name); connector->name);
} }
@ -5117,6 +5117,7 @@ static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
/* YCRCB444 is optional according to spec. */ /* YCRCB444 is optional according to spec. */
if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) { if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
info->edid_hdmi_ycbcr444_dc_modes = info->edid_hdmi_rgb444_dc_modes;
DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n", DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
connector->name); connector->name);
} }

4
drivers/gpu/drm/i915/display/intel_hdmi.c
View file

@ -1912,7 +1912,7 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *connector,
if (ycbcr420_output) if (ycbcr420_output)
return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36; return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36;
else else
return info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_36; return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36;
case 10: case 10:
if (!has_hdmi_sink) if (!has_hdmi_sink)
return false; return false;
@ -1920,7 +1920,7 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *connector,
if (ycbcr420_output) if (ycbcr420_output)
return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30; return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30;
else else
return info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30; return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30;
case 8: case 8:
return true; return true;
default: default:

2
drivers/gpu/drm/radeon/radeon_connectors.c
View file

@ -204,7 +204,7 @@ int radeon_get_monitor_bpc(struct drm_connector *connector)
/* Check if bpc is within clock limit. Try to degrade gracefully otherwise */ /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) { if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) && if ((connector->display_info.edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30) &&
(mode_clock * 5/4 <= max_tmds_clock)) (mode_clock * 5/4 <= max_tmds_clock))
bpc = 10; bpc = 10;
else else

12
include/drm/drm_connector.h
View file

@ -592,10 +592,16 @@ struct drm_display_info {
bool rgb_quant_range_selectable; bool rgb_quant_range_selectable;
/** /**
* @edid_hdmi_dc_modes: Mask of supported hdmi deep color modes. Even * @edid_hdmi_dc_rgb444_modes: Mask of supported hdmi deep color modes
* more stuff redundant with @bus_formats. * in RGB 4:4:4. Even more stuff redundant with @bus_formats.
*/ */
u8 edid_hdmi_dc_modes; u8 edid_hdmi_rgb444_dc_modes;
/**
* @edid_hdmi_dc_ycbcr444_modes: Mask of supported hdmi deep color
* modes in YCbCr 4:4:4. Even more stuff redundant with @bus_formats.
*/
u8 edid_hdmi_ycbcr444_dc_modes;
/** /**
* @cea_rev: CEA revision of the HDMI sink. * @cea_rev: CEA revision of the HDMI sink.