drm/amdgpu: Add sysfs nodes to get xcp details
Add partition config nodes in sysfs to get resource instance details for a particular partition mode. A resource could be anything like an xcc, vcn decoder, system dma units etc. Details of various resource instances are available under /sys/bus/pci/devices/.../compute_partition_config/ Select a partition configuration: /sys/bus/pci/devices/.../compute_partition_config/xcp_config Number of instances of a resource: /sys/bus/pci/devices/.../compute_partition_config/<rsrc_name>/num_inst Total partitions sharing the resource: /sys/bus/pci/devices/.../compute_partition_config/<rsrc_name>/num_shared v2: Update node name as per spec Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar
Alex Deucher
parent
fa73462dc0
commit
4ae86dc878
3 changed files with 208 additions and 0 deletions
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@ -4486,6 +4486,7 @@ fence_driver_init:
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amdgpu_fru_sysfs_init(adev);
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amdgpu_reg_state_sysfs_init(adev);
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amdgpu_xcp_cfg_sysfs_init(adev);
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if (IS_ENABLED(CONFIG_PERF_EVENTS))
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r = amdgpu_pmu_init(adev);
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@ -4608,6 +4609,7 @@ void amdgpu_device_fini_hw(struct amdgpu_device *adev)
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amdgpu_fru_sysfs_fini(adev);
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amdgpu_reg_state_sysfs_fini(adev);
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amdgpu_xcp_cfg_sysfs_fini(adev);
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/* disable ras feature must before hw fini */
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amdgpu_ras_pre_fini(adev);
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@ -433,3 +433,204 @@ void amdgpu_xcp_release_sched(struct amdgpu_device *adev,
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}
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}
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#define XCP_CFG_SYSFS_RES_ATTR_SHOW(_name) \
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static ssize_t amdgpu_xcp_res_sysfs_##_name##_show( \
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struct amdgpu_xcp_res_details *xcp_res, char *buf) \
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{ \
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return sysfs_emit(buf, "%d\n", xcp_res->_name); \
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}
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struct amdgpu_xcp_res_sysfs_attribute {
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struct attribute attr;
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ssize_t (*show)(struct amdgpu_xcp_res_details *xcp_res, char *buf);
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};
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#define XCP_CFG_SYSFS_RES_ATTR(_name) \
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struct amdgpu_xcp_res_sysfs_attribute xcp_res_sysfs_attr_##_name = { \
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.attr = { .name = __stringify(_name), .mode = 0400 }, \
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.show = amdgpu_xcp_res_sysfs_##_name##_show, \
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}
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XCP_CFG_SYSFS_RES_ATTR_SHOW(num_inst)
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XCP_CFG_SYSFS_RES_ATTR(num_inst);
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XCP_CFG_SYSFS_RES_ATTR_SHOW(num_shared)
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XCP_CFG_SYSFS_RES_ATTR(num_shared);
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#define XCP_CFG_SYSFS_RES_ATTR_PTR(_name) xcp_res_sysfs_attr_##_name.attr
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static struct attribute *xcp_cfg_res_sysfs_attrs[] = {
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&XCP_CFG_SYSFS_RES_ATTR_PTR(num_inst),
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&XCP_CFG_SYSFS_RES_ATTR_PTR(num_shared), NULL
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};
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ATTRIBUTE_GROUPS(xcp_cfg_res_sysfs);
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#define to_xcp_attr(x) \
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container_of(x, struct amdgpu_xcp_res_sysfs_attribute, attr)
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#define to_xcp_res(x) container_of(x, struct amdgpu_xcp_res_details, kobj)
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static ssize_t xcp_cfg_res_sysfs_attr_show(struct kobject *kobj,
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struct attribute *attr, char *buf)
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{
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struct amdgpu_xcp_res_sysfs_attribute *attribute;
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struct amdgpu_xcp_res_details *xcp_res;
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attribute = to_xcp_attr(attr);
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xcp_res = to_xcp_res(kobj);
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if (!attribute->show)
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return -EIO;
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return attribute->show(xcp_res, buf);
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}
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static const struct sysfs_ops xcp_cfg_res_sysfs_ops = {
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.show = xcp_cfg_res_sysfs_attr_show,
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};
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static const struct kobj_type xcp_cfg_res_sysfs_ktype = {
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.sysfs_ops = &xcp_cfg_res_sysfs_ops,
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.default_groups = xcp_cfg_res_sysfs_groups,
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};
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const char *xcp_res_names[] = {
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[AMDGPU_XCP_RES_XCC] = "xcc",
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[AMDGPU_XCP_RES_DMA] = "dma",
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[AMDGPU_XCP_RES_DEC] = "dec",
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[AMDGPU_XCP_RES_JPEG] = "jpeg",
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};
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static int amdgpu_xcp_get_res_info(struct amdgpu_xcp_mgr *xcp_mgr,
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int mode,
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struct amdgpu_xcp_cfg *xcp_cfg)
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{
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if (xcp_mgr->funcs && xcp_mgr->funcs->get_xcp_res_info)
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return xcp_mgr->funcs->get_xcp_res_info(xcp_mgr, mode, xcp_cfg);
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return -EOPNOTSUPP;
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}
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#define to_xcp_cfg(x) container_of(x, struct amdgpu_xcp_cfg, kobj)
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static ssize_t xcp_config_show(struct kobject *kobj,
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struct kobj_attribute *attr, char *buf)
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{
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struct amdgpu_xcp_cfg *xcp_cfg = to_xcp_cfg(kobj);
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return sysfs_emit(buf, "%s\n",
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amdgpu_gfx_compute_mode_desc(xcp_cfg->mode));
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}
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static ssize_t xcp_config_store(struct kobject *kobj,
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struct kobj_attribute *attr,
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const char *buf, size_t size)
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{
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struct amdgpu_xcp_cfg *xcp_cfg = to_xcp_cfg(kobj);
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int mode, r;
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if (!strncasecmp("SPX", buf, strlen("SPX")))
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mode = AMDGPU_SPX_PARTITION_MODE;
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else if (!strncasecmp("DPX", buf, strlen("DPX")))
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mode = AMDGPU_DPX_PARTITION_MODE;
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else if (!strncasecmp("TPX", buf, strlen("TPX")))
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mode = AMDGPU_TPX_PARTITION_MODE;
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else if (!strncasecmp("QPX", buf, strlen("QPX")))
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mode = AMDGPU_QPX_PARTITION_MODE;
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else if (!strncasecmp("CPX", buf, strlen("CPX")))
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mode = AMDGPU_CPX_PARTITION_MODE;
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else
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return -EINVAL;
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r = amdgpu_xcp_get_res_info(xcp_cfg->xcp_mgr, mode, xcp_cfg);
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if (r)
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return r;
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xcp_cfg->mode = mode;
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return size;
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}
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static struct kobj_attribute xcp_cfg_sysfs_mode =
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__ATTR_RW_MODE(xcp_config, 0644);
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static void xcp_cfg_sysfs_release(struct kobject *kobj)
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{
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struct amdgpu_xcp_cfg *xcp_cfg = to_xcp_cfg(kobj);
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kfree(xcp_cfg);
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}
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static const struct kobj_type xcp_cfg_sysfs_ktype = {
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.release = xcp_cfg_sysfs_release,
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.sysfs_ops = &kobj_sysfs_ops,
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};
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void amdgpu_xcp_cfg_sysfs_init(struct amdgpu_device *adev)
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{
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struct amdgpu_xcp_res_details *xcp_res;
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struct amdgpu_xcp_cfg *xcp_cfg;
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int i, r, j, rid;
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if (!adev->xcp_mgr)
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return;
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xcp_cfg = kzalloc(sizeof(*xcp_cfg), GFP_KERNEL);
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if (!xcp_cfg)
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return;
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xcp_cfg->xcp_mgr = adev->xcp_mgr;
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r = kobject_init_and_add(&xcp_cfg->kobj, &xcp_cfg_sysfs_ktype,
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&adev->dev->kobj, "compute_partition_config");
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if (r)
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goto err1;
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r = sysfs_create_file(&xcp_cfg->kobj, &xcp_cfg_sysfs_mode.attr);
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if (r)
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goto err1;
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r = amdgpu_xcp_get_res_info(xcp_cfg->xcp_mgr, xcp_cfg->xcp_mgr->mode, xcp_cfg);
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if (r)
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goto err1;
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xcp_cfg->mode = xcp_cfg->xcp_mgr->mode;
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for (i = 0; i < xcp_cfg->num_res; i++) {
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xcp_res = &xcp_cfg->xcp_res[i];
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rid = xcp_res->id;
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r = kobject_init_and_add(&xcp_res->kobj,
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&xcp_cfg_res_sysfs_ktype,
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&xcp_cfg->kobj, "%s",
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xcp_res_names[rid]);
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if (r)
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goto err;
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}
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adev->xcp_mgr->xcp_cfg = xcp_cfg;
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return;
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err:
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for (j = 0; j < i; j++) {
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xcp_res = &xcp_cfg->xcp_res[i];
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kobject_put(&xcp_res->kobj);
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}
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sysfs_remove_file(&xcp_cfg->kobj, &xcp_cfg_sysfs_mode.attr);
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err1:
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kobject_put(&xcp_cfg->kobj);
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}
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void amdgpu_xcp_cfg_sysfs_fini(struct amdgpu_device *adev)
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{
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struct amdgpu_xcp_res_details *xcp_res;
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struct amdgpu_xcp_cfg *xcp_cfg;
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int i;
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if (!adev->xcp_mgr)
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return;
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xcp_cfg = adev->xcp_mgr->xcp_cfg;
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for (i = 0; i < xcp_cfg->num_res; i++) {
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xcp_res = &xcp_cfg->xcp_res[i];
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kobject_put(&xcp_res->kobj);
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}
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sysfs_remove_file(&xcp_cfg->kobj, &xcp_cfg_sysfs_mode.attr);
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kobject_put(&xcp_cfg->kobj);
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}
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@ -68,6 +68,7 @@ struct amdgpu_xcp_res_details {
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enum amdgpu_xcp_res_id id;
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u8 num_inst;
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u8 num_shared;
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struct kobject kobj;
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};
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struct amdgpu_xcp_cfg {
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@ -75,6 +76,7 @@ struct amdgpu_xcp_cfg {
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struct amdgpu_xcp_res_details xcp_res[AMDGPU_XCP_RES_MAX];
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u8 num_res;
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struct amdgpu_xcp_mgr *xcp_mgr;
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struct kobject kobj;
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};
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struct amdgpu_xcp_ip_funcs {
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@ -172,6 +174,9 @@ int amdgpu_xcp_open_device(struct amdgpu_device *adev,
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void amdgpu_xcp_release_sched(struct amdgpu_device *adev,
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struct amdgpu_ctx_entity *entity);
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void amdgpu_xcp_cfg_sysfs_init(struct amdgpu_device *adev);
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void amdgpu_xcp_cfg_sysfs_fini(struct amdgpu_device *adev);
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#define amdgpu_xcp_select_scheds(adev, e, c, d, x, y) \
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((adev)->xcp_mgr && (adev)->xcp_mgr->funcs && \
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(adev)->xcp_mgr->funcs->select_scheds ? \
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