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i2c: cadence: Add standard bus recovery support

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Hook up the standard GPIO/pinctrl-based recovery support.
We are doing the recovery at the beginning on a timeout.

Multiple people have contributed to the series.
Original patch from Cirag and another one from Robert.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
This commit is contained in:
Shubhrajyoti Datta 2022-07-28 11:21:50 +05:30 • committed by Wolfram Sang
parent bdc4af281b
commit 58b924241d
1 changed files with 19 additions and 1 deletions
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20
drivers/i2c/busses/i2c-cadence.c
View file

@ -10,10 +10,12 @@
#include <linux/i2c.h> #include <linux/i2c.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/pinctrl/consumer.h>
/* Register offsets for the I2C device. */ /* Register offsets for the I2C device. */
#define CDNS_I2C_CR_OFFSET 0x00 /* Control Register, RW */ #define CDNS_I2C_CR_OFFSET 0x00 /* Control Register, RW */
@ -127,6 +129,8 @@
#define CDNS_I2C_TIMEOUT_MAX 0xFF #define CDNS_I2C_TIMEOUT_MAX 0xFF
#define CDNS_I2C_BROKEN_HOLD_BIT BIT(0) #define CDNS_I2C_BROKEN_HOLD_BIT BIT(0)
#define CDNS_I2C_POLL_US 100000
#define CDNS_I2C_TIMEOUT_US 500000
#define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset) #define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
#define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset) #define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
@ -204,6 +208,7 @@ struct cdns_i2c {
struct notifier_block clk_rate_change_nb; struct notifier_block clk_rate_change_nb;
u32 quirks; u32 quirks;
u32 ctrl_reg; u32 ctrl_reg;
struct i2c_bus_recovery_info rinfo;
#if IS_ENABLED(CONFIG_I2C_SLAVE) #if IS_ENABLED(CONFIG_I2C_SLAVE)
u16 ctrl_reg_diva_divb; u16 ctrl_reg_diva_divb;
struct i2c_client *slave; struct i2c_client *slave;
@ -840,8 +845,14 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
#endif #endif
/* Check if the bus is free */ /* Check if the bus is free */
if (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) & CDNS_I2C_SR_BA) {
ret = readl_relaxed_poll_timeout(id->membase + CDNS_I2C_SR_OFFSET,
reg,
!(reg & CDNS_I2C_SR_BA),
CDNS_I2C_POLL_US, CDNS_I2C_TIMEOUT_US);
if (ret) {
ret = -EAGAIN; ret = -EAGAIN;
i2c_recover_bus(adap);
goto out; goto out;
} }
@ -1250,6 +1261,12 @@ static int cdns_i2c_probe(struct platform_device *pdev)
id->quirks = data->quirks; id->quirks = data->quirks;
} }
id->rinfo.pinctrl = devm_pinctrl_get(&pdev->dev);
if (IS_ERR(id->rinfo.pinctrl)) {
dev_info(&pdev->dev, "can't get pinctrl, bus recovery not supported\n");
return PTR_ERR(id->rinfo.pinctrl);
}
id->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &r_mem); id->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &r_mem);
if (IS_ERR(id->membase)) if (IS_ERR(id->membase))
return PTR_ERR(id->membase); return PTR_ERR(id->membase);
@ -1266,6 +1283,7 @@ static int cdns_i2c_probe(struct platform_device *pdev)
id->adap.retries = 3; /* Default retry value. */ id->adap.retries = 3; /* Default retry value. */
id->adap.algo_data = id; id->adap.algo_data = id;
id->adap.dev.parent = &pdev->dev; id->adap.dev.parent = &pdev->dev;
id->adap.bus_recovery_info = &id->rinfo;
init_completion(&id->xfer_done); init_completion(&id->xfer_done);
snprintf(id->adap.name, sizeof(id->adap.name), snprintf(id->adap.name, sizeof(id->adap.name),
"Cadence I2C at %08lx", (unsigned long)r_mem->start); "Cadence I2C at %08lx", (unsigned long)r_mem->start);