drm/i915: Introduce i9xx_check_plane_surface()
Extract the primary plane surfae offset/x/y calculations for pre-SKL platforms into a common function, and call it during the atomic check phase to reduce the amount of stuff we have to do during the commit phase. SKL is already doing this. v2: Update the comment about the rotation adjustments to match the code better (Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: http://patchwork.freedesktop.org/patch/msgid/20170323192712.30682-5-ville.syrjala@linux.intel.com
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1 changed files with 50 additions and 32 deletions
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@ -3026,6 +3026,43 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
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return dspcntr;
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}
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static int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
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{
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struct drm_i915_private *dev_priv =
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to_i915(plane_state->base.plane->dev);
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int src_x = plane_state->base.src.x1 >> 16;
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int src_y = plane_state->base.src.y1 >> 16;
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u32 offset;
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intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
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if (INTEL_GEN(dev_priv) >= 4)
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offset = intel_compute_tile_offset(&src_x, &src_y,
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plane_state, 0);
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else
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offset = 0;
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/* HSW/BDW do this automagically in hardware */
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if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) {
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unsigned int rotation = plane_state->base.rotation;
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int src_w = drm_rect_width(&plane_state->base.src) >> 16;
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int src_h = drm_rect_height(&plane_state->base.src) >> 16;
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if (rotation & DRM_ROTATE_180) {
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src_x += src_w - 1;
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src_y += src_h - 1;
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} else if (rotation & DRM_REFLECT_X) {
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src_x += src_w - 1;
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}
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}
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plane_state->main.offset = offset;
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plane_state->main.x = src_x;
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plane_state->main.y = src_y;
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return 0;
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}
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static void i9xx_update_primary_plane(struct drm_plane *primary,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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@ -3037,27 +3074,15 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
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u32 linear_offset;
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u32 dspcntr = plane_state->ctl;
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i915_reg_t reg = DSPCNTR(plane);
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unsigned int rotation = plane_state->base.rotation;
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int x = plane_state->base.src.x1 >> 16;
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int y = plane_state->base.src.y1 >> 16;
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int x = plane_state->main.x;
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int y = plane_state->main.y;
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unsigned long irqflags;
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intel_add_fb_offsets(&x, &y, plane_state, 0);
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if (INTEL_GEN(dev_priv) >= 4)
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intel_crtc->dspaddr_offset =
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intel_compute_tile_offset(&x, &y, plane_state, 0);
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if (rotation & DRM_ROTATE_180) {
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x += crtc_state->pipe_src_w - 1;
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y += crtc_state->pipe_src_h - 1;
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} else if (rotation & DRM_REFLECT_X) {
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x += crtc_state->pipe_src_w - 1;
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}
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linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
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if (INTEL_GEN(dev_priv) < 4)
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if (INTEL_GEN(dev_priv) >= 4)
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intel_crtc->dspaddr_offset = plane_state->main.offset;
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else
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intel_crtc->dspaddr_offset = linear_offset;
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intel_crtc->adjusted_x = x;
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@ -3133,25 +3158,14 @@ static void ironlake_update_primary_plane(struct drm_plane *primary,
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u32 linear_offset;
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u32 dspcntr = plane_state->ctl;
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i915_reg_t reg = DSPCNTR(plane);
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unsigned int rotation = plane_state->base.rotation;
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int x = plane_state->base.src.x1 >> 16;
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int y = plane_state->base.src.y1 >> 16;
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int x = plane_state->main.x;
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int y = plane_state->main.y;
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unsigned long irqflags;
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intel_add_fb_offsets(&x, &y, plane_state, 0);
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intel_crtc->dspaddr_offset =
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intel_compute_tile_offset(&x, &y, plane_state, 0);
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/* HSW+ does this automagically in hardware */
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if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv) &&
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rotation & DRM_ROTATE_180) {
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x += crtc_state->pipe_src_w - 1;
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y += crtc_state->pipe_src_h - 1;
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}
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linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
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intel_crtc->dspaddr_offset = plane_state->main.offset;
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intel_crtc->adjusted_x = x;
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intel_crtc->adjusted_y = y;
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@ -13365,6 +13379,10 @@ intel_check_primary_plane(struct drm_plane *plane,
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state->ctl = skl_plane_ctl(crtc_state, state);
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} else {
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ret = i9xx_check_plane_surface(state);
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if (ret)
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return ret;
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state->ctl = i9xx_plane_ctl(crtc_state, state);
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}
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