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hwspinlock: qcom: add support for MMIO on older SoCs

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Older Qualcomm SoCs have TCSR mutex registers with 0x80 stride, instead
of 0x1000.  Add dedicated compatibles and regmap for such case.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-5-krzysztof.kozlowski@linaro.org
This commit is contained in:
Krzysztof Kozlowski 2022-09-09 11:20:24 +02:00 • committed by Bjorn Andersson
parent 90cb380f9c
commit 5d4753f741
1 changed files with 32 additions and 10 deletions
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42
drivers/hwspinlock/qcom_hwspinlock.c
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@ -22,6 +22,7 @@
struct qcom_hwspinlock_of_data { struct qcom_hwspinlock_of_data {
u32 offset; u32 offset;
u32 stride; u32 stride;
const struct regmap_config *regmap_config;
}; };
static int qcom_hwspinlock_trylock(struct hwspinlock *lock) static int qcom_hwspinlock_trylock(struct hwspinlock *lock)
@ -73,15 +74,42 @@ static const struct qcom_hwspinlock_of_data of_sfpb_mutex = {
.stride = 0x4, .stride = 0x4,
}; };
/* All modern platform has offset 0 and stride of 4k */ static const struct regmap_config tcsr_msm8226_mutex_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.max_register = 0x1000,
.fast_io = true,
};
static const struct qcom_hwspinlock_of_data of_msm8226_tcsr_mutex = {
.offset = 0,
.stride = 0x80,
.regmap_config = &tcsr_msm8226_mutex_config,
};
static const struct regmap_config tcsr_mutex_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.max_register = 0x20000,
.fast_io = true,
};
static const struct qcom_hwspinlock_of_data of_tcsr_mutex = { static const struct qcom_hwspinlock_of_data of_tcsr_mutex = {
.offset = 0, .offset = 0,
.stride = 0x1000, .stride = 0x1000,
.regmap_config = &tcsr_mutex_config,
}; };
static const struct of_device_id qcom_hwspinlock_of_match[] = { static const struct of_device_id qcom_hwspinlock_of_match[] = {
{ .compatible = "qcom,sfpb-mutex", .data = &of_sfpb_mutex }, { .compatible = "qcom,sfpb-mutex", .data = &of_sfpb_mutex },
{ .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex }, { .compatible = "qcom,tcsr-mutex", .data = &of_tcsr_mutex },
{ .compatible = "qcom,apq8084-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
{ .compatible = "qcom,ipq6018-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
{ .compatible = "qcom,msm8226-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
{ .compatible = "qcom,msm8974-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
{ .compatible = "qcom,msm8994-tcsr-mutex", .data = &of_msm8226_tcsr_mutex },
{ } { }
}; };
MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match); MODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
@ -117,14 +145,6 @@ static struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev,
return regmap; return regmap;
} }
static const struct regmap_config tcsr_mutex_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.max_register = 0x20000,
.fast_io = true,
};
static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev, static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev,
u32 *offset, u32 *stride) u32 *offset, u32 *stride)
{ {
@ -133,6 +153,8 @@ static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev,
void __iomem *base; void __iomem *base;
data = of_device_get_match_data(dev); data = of_device_get_match_data(dev);
if (!data->regmap_config)
return ERR_PTR(-EINVAL);
*offset = data->offset; *offset = data->offset;
*stride = data->stride; *stride = data->stride;
@ -141,7 +163,7 @@ static struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev,
if (IS_ERR(base)) if (IS_ERR(base))
return ERR_CAST(base); return ERR_CAST(base);
return devm_regmap_init_mmio(dev, base, &tcsr_mutex_config); return devm_regmap_init_mmio(dev, base, data->regmap_config);
} }
static int qcom_hwspinlock_probe(struct platform_device *pdev) static int qcom_hwspinlock_probe(struct platform_device *pdev)