drm/msm: Enable expanded apriv support for a650
a650 supports expanded apriv support that allows us to map critical buffers (ringbuffer and memstore) as as privileged to protect them from corruption. Cc: stable@vger.kernel.org Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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34221545d2
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4 changed files with 19 additions and 4 deletions
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@ -678,7 +678,8 @@ static int a6xx_hw_init(struct msm_gpu *gpu)
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A6XX_PROTECT_RDONLY(0x980, 0x4));
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gpu_write(gpu, REG_A6XX_CP_PROTECT(25), A6XX_PROTECT_RW(0xa630, 0x0));
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if (adreno_is_a650(adreno_gpu)) {
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/* Enable expanded apriv for targets that support it */
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if (gpu->hw_apriv) {
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gpu_write(gpu, REG_A6XX_CP_APRIV_CNTL,
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(1 << 6) | (1 << 5) | (1 << 3) | (1 << 2) | (1 << 1));
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}
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@ -1056,6 +1057,9 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
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adreno_gpu->registers = NULL;
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adreno_gpu->reg_offsets = a6xx_register_offsets;
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if (adreno_is_a650(adreno_gpu))
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adreno_gpu->base.hw_apriv = true;
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ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);
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if (ret) {
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a6xx_destroy(&(a6xx_gpu->base.base));
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@ -908,7 +908,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev,
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memptrs = msm_gem_kernel_new(drm,
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sizeof(struct msm_rbmemptrs) * nr_rings,
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MSM_BO_UNCACHED, gpu->aspace, &gpu->memptrs_bo,
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check_apriv(gpu, MSM_BO_UNCACHED), gpu->aspace, &gpu->memptrs_bo,
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&memptrs_iova);
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if (IS_ERR(memptrs)) {
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@ -15,6 +15,7 @@
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#include "msm_drv.h"
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#include "msm_fence.h"
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#include "msm_ringbuffer.h"
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#include "msm_gem.h"
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struct msm_gem_submit;
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struct msm_gpu_perfcntr;
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@ -139,6 +140,8 @@ struct msm_gpu {
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} devfreq;
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struct msm_gpu_state *crashstate;
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/* True if the hardware supports expanded apriv (a650 and newer) */
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bool hw_apriv;
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};
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/* It turns out that all targets use the same ringbuffer size */
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@ -327,4 +330,12 @@ static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu)
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mutex_unlock(&gpu->dev->struct_mutex);
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}
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/*
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* Simple macro to semi-cleanly add the MAP_PRIV flag for targets that can
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* support expanded privileges
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*/
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#define check_apriv(gpu, flags) \
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(((gpu)->hw_apriv ? MSM_BO_MAP_PRIV : 0) | (flags))
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#endif /* __MSM_GPU_H__ */
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@ -27,8 +27,8 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
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ring->id = id;
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ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,
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MSM_BO_WC | MSM_BO_GPU_READONLY, gpu->aspace, &ring->bo,
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&ring->iova);
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check_apriv(gpu, MSM_BO_WC | MSM_BO_GPU_READONLY),
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gpu->aspace, &ring->bo, &ring->iova);
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if (IS_ERR(ring->start)) {
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ret = PTR_ERR(ring->start);
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