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mirror of synced 2025-03-06 20:59:54 +01:00

drm/i915/display: move hti under display sub-struct

Move display hti/hdport related members under drm_i915_private display
sub-struct.

Prefer adding anonymous sub-structs even for single members that aren't
our own structs.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221109144209.3624739-2-jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2022-11-09 16:42:07 +02:00
parent 03120feffb
commit 6274991254
3 changed files with 15 additions and 13 deletions

View file

@ -370,6 +370,16 @@ struct intel_display {
struct mutex comp_mutex;
} hdcp;
struct {
/*
* HTI (aka HDPORT) state read during initial hw readout. Most
* platforms don't have HTI, so this will just stay 0. Those
* that do will use this later to figure out which PLLs and PHYs
* are unavailable for driver usage.
*/
u32 state;
} hti;
struct {
struct i915_power_domains domains;

View file

@ -16,23 +16,23 @@ void intel_hti_init(struct drm_i915_private *i915)
* any display resources before we create our display outputs.
*/
if (INTEL_INFO(i915)->display.has_hti)
i915->hti_state = intel_de_read(i915, HDPORT_STATE);
i915->display.hti.state = intel_de_read(i915, HDPORT_STATE);
}
bool intel_hti_uses_phy(struct drm_i915_private *i915, enum phy phy)
{
return i915->hti_state & HDPORT_ENABLED &&
i915->hti_state & HDPORT_DDI_USED(phy);
return i915->display.hti.state & HDPORT_ENABLED &&
i915->display.hti.state & HDPORT_DDI_USED(phy);
}
u32 intel_hti_dpll_mask(struct drm_i915_private *i915)
{
if (!(i915->hti_state & HDPORT_ENABLED))
if (!(i915->display.hti.state & HDPORT_ENABLED))
return 0;
/*
* Note: This is subtle. The values must coincide with what's defined
* for the platform.
*/
return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->hti_state);
return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->display.hti.state);
}

View file

@ -300,14 +300,6 @@ struct drm_i915_private {
struct intel_l3_parity l3_parity;
/*
* HTI (aka HDPORT) state read during initial hw readout. Most
* platforms don't have HTI, so this will just stay 0. Those that do
* will use this later to figure out which PLLs and PHYs are unavailable
* for driver usage.
*/
u32 hti_state;
/*
* edram size in MB.
* Cannot be determined by PCIID. You must always read a register.