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mirror of synced 2025-03-06 20:59:54 +01:00

drm/amdgpu: update amdgpu device suspend/resume sequence for s0i3 support

- Need skip the RLC/CP/GFX disable for let GFXOFF enter during suspend period.
- For s0i3 suspend only need suspend DCE and each IP interrupt.
- Before VBIOS POSTed check and atom HW INT need set the GPU power status change
  to D0 in the resume period, otherwise the HW will be mess up and see the SDMA hang.
- Need handle the GPU reset path during amdgpu device suspend.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Prike Liang 2020-09-09 14:40:24 +08:00 committed by Alex Deucher
parent d90a53d65a
commit 628c36d7b2

View file

@ -2650,8 +2650,10 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev)
{ {
int i, r; int i, r;
amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE); if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev)) {
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE); amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
}
for (i = adev->num_ip_blocks - 1; i >= 0; i--) { for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
if (!adev->ip_blocks[i].status.valid) if (!adev->ip_blocks[i].status.valid)
@ -3706,8 +3708,10 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
amdgpu_fence_driver_suspend(adev); amdgpu_fence_driver_suspend(adev);
r = amdgpu_device_ip_suspend_phase2(adev); if (!amdgpu_acpi_is_s0ix_supported() || amdgpu_in_reset(adev))
r = amdgpu_device_ip_suspend_phase2(adev);
else
amdgpu_gfx_state_change_set(adev, sGpuChangeState_D3Entry);
/* evict remaining vram memory /* evict remaining vram memory
* This second call to evict vram is to evict the gart page table * This second call to evict vram is to evict the gart page table
* using the CPU. * using the CPU.
@ -3738,6 +3742,9 @@ int amdgpu_device_resume(struct drm_device *dev, bool fbcon)
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF) if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
return 0; return 0;
if (amdgpu_acpi_is_s0ix_supported())
amdgpu_gfx_state_change_set(adev, sGpuChangeState_D0Entry);
/* post card */ /* post card */
if (amdgpu_device_need_post(adev)) { if (amdgpu_device_need_post(adev)) {
r = amdgpu_device_asic_init(adev); r = amdgpu_device_asic_init(adev);