drm/amd/display: Disable DCN401 UCLK P-State support on full updates
[WHY&HOW] It is not guaranteed even for HW exclusive P-State methods (like VActive) that P-state will be supported properly until optimize bandwidth is called, so unconditionally disable it on full updates. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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cc2991203c
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67ea53a4bd
1 changed files with 3 additions and 3 deletions
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@ -1401,8 +1401,8 @@ void dcn401_prepare_bandwidth(struct dc *dc,
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bool p_state_change_support = context->bw_ctx.bw.dcn.clk.p_state_change_support;
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unsigned int compbuf_size_kb = 0;
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/* Any transition into or out of a FAMS config should disable MCLK switching first to avoid hangs */
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if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {
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/* Any transition into P-State support should disable MCLK switching first to avoid hangs */
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if (p_state_change_support) {
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dc->optimized_required = true;
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context->bw_ctx.bw.dcn.clk.p_state_change_support = false;
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}
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@ -1441,7 +1441,7 @@ void dcn401_prepare_bandwidth(struct dc *dc,
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dcn401_fams2_global_control_lock(dc, context, false);
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}
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if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || dc->clk_mgr->clks.fw_based_mclk_switching) {
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if (p_state_change_support != context->bw_ctx.bw.dcn.clk.p_state_change_support) {
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/* After disabling P-State, restore the original value to ensure we get the correct P-State
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* on the next optimize. */
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context->bw_ctx.bw.dcn.clk.p_state_change_support = p_state_change_support;
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