Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Adjacent changes: net/mptcp/protocol.h63740448a3("mptcp: fix accept vs worker race")2a6a870e44("mptcp: stops worker on unaccepted sockets at listener close")ddb1a072f8("mptcp: move first subflow allocation at mpc access time") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
commit
681c5b51dc
186 changed files with 1670 additions and 917 deletions
4
.mailmap
4
.mailmap
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@ -232,6 +232,8 @@ Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com>
|
||||||
John Crispin <john@phrozen.org> <blogic@openwrt.org>
|
John Crispin <john@phrozen.org> <blogic@openwrt.org>
|
||||||
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
|
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
|
||||||
John Stultz <johnstul@us.ibm.com>
|
John Stultz <johnstul@us.ibm.com>
|
||||||
|
<jon.toppins+linux@gmail.com> <jtoppins@cumulusnetworks.com>
|
||||||
|
<jon.toppins+linux@gmail.com> <jtoppins@redhat.com>
|
||||||
Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
|
Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
|
||||||
<josh@joshtriplett.org> <josh@freedesktop.org>
|
<josh@joshtriplett.org> <josh@freedesktop.org>
|
||||||
<josh@joshtriplett.org> <josh@kernel.org>
|
<josh@joshtriplett.org> <josh@kernel.org>
|
||||||
|
|
@ -297,6 +299,8 @@ Martin Kepplinger <martink@posteo.de> <martin.kepplinger@puri.sm>
|
||||||
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
|
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
|
||||||
Martyna Szapar-Mudlaw <martyna.szapar-mudlaw@linux.intel.com> <martyna.szapar-mudlaw@intel.com>
|
Martyna Szapar-Mudlaw <martyna.szapar-mudlaw@linux.intel.com> <martyna.szapar-mudlaw@intel.com>
|
||||||
Mathieu Othacehe <m.othacehe@gmail.com>
|
Mathieu Othacehe <m.othacehe@gmail.com>
|
||||||
|
Mat Martineau <martineau@kernel.org> <mathew.j.martineau@linux.intel.com>
|
||||||
|
Mat Martineau <martineau@kernel.org> <mathewm@codeaurora.org>
|
||||||
Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com>
|
Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com>
|
||||||
Matthew Wilcox <willy@infradead.org> <matthew@wil.cx>
|
Matthew Wilcox <willy@infradead.org> <matthew@wil.cx>
|
||||||
Matthew Wilcox <willy@infradead.org> <mawilcox@linuxonhyperv.com>
|
Matthew Wilcox <willy@infradead.org> <mawilcox@linuxonhyperv.com>
|
||||||
|
|
|
||||||
|
|
@ -128,6 +128,7 @@ parameter is applicable::
|
||||||
KVM Kernel Virtual Machine support is enabled.
|
KVM Kernel Virtual Machine support is enabled.
|
||||||
LIBATA Libata driver is enabled
|
LIBATA Libata driver is enabled
|
||||||
LP Printer support is enabled.
|
LP Printer support is enabled.
|
||||||
|
LOONGARCH LoongArch architecture is enabled.
|
||||||
LOOP Loopback device support is enabled.
|
LOOP Loopback device support is enabled.
|
||||||
M68k M68k architecture is enabled.
|
M68k M68k architecture is enabled.
|
||||||
These options have more detailed description inside of
|
These options have more detailed description inside of
|
||||||
|
|
|
||||||
|
|
@ -6933,6 +6933,12 @@
|
||||||
When enabled, memory and cache locality will be
|
When enabled, memory and cache locality will be
|
||||||
impacted.
|
impacted.
|
||||||
|
|
||||||
|
writecombine= [LOONGARCH] Control the MAT (Memory Access Type) of
|
||||||
|
ioremap_wc().
|
||||||
|
|
||||||
|
on - Enable writecombine, use WUC for ioremap_wc()
|
||||||
|
off - Disable writecombine, use SUC for ioremap_wc()
|
||||||
|
|
||||||
x2apic_phys [X86-64,APIC] Use x2apic physical mode instead of
|
x2apic_phys [X86-64,APIC] Use x2apic physical mode instead of
|
||||||
default x2apic cluster mode on platforms
|
default x2apic cluster mode on platforms
|
||||||
supporting x2apic.
|
supporting x2apic.
|
||||||
|
|
|
||||||
|
|
@ -171,6 +171,10 @@ Getting Help
|
||||||
Getting LLVM
|
Getting LLVM
|
||||||
-------------
|
-------------
|
||||||
|
|
||||||
|
We provide prebuilt stable versions of LLVM on `kernel.org <https://kernel.org/pub/tools/llvm/>`_.
|
||||||
|
Below are links that may be useful for building LLVM from source or procuring
|
||||||
|
it through a distribution's package manager.
|
||||||
|
|
||||||
- https://releases.llvm.org/download.html
|
- https://releases.llvm.org/download.html
|
||||||
- https://github.com/llvm/llvm-project
|
- https://github.com/llvm/llvm-project
|
||||||
- https://llvm.org/docs/GettingStarted.html
|
- https://llvm.org/docs/GettingStarted.html
|
||||||
|
|
|
||||||
|
|
@ -7,6 +7,21 @@ ice devlink support
|
||||||
This document describes the devlink features implemented by the ``ice``
|
This document describes the devlink features implemented by the ``ice``
|
||||||
device driver.
|
device driver.
|
||||||
|
|
||||||
|
Parameters
|
||||||
|
==========
|
||||||
|
|
||||||
|
.. list-table:: Generic parameters implemented
|
||||||
|
|
||||||
|
* - Name
|
||||||
|
- Mode
|
||||||
|
- Notes
|
||||||
|
* - ``enable_roce``
|
||||||
|
- runtime
|
||||||
|
- mutually exclusive with ``enable_iwarp``
|
||||||
|
* - ``enable_iwarp``
|
||||||
|
- runtime
|
||||||
|
- mutually exclusive with ``enable_roce``
|
||||||
|
|
||||||
Info versions
|
Info versions
|
||||||
=============
|
=============
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -47,7 +47,7 @@ RISC-V Linux Kernel SV39
|
||||||
| Kernel-space virtual memory, shared between all processes:
|
| Kernel-space virtual memory, shared between all processes:
|
||||||
____________________________________________________________|___________________________________________________________
|
____________________________________________________________|___________________________________________________________
|
||||||
| | | |
|
| | | |
|
||||||
ffffffc6fee00000 | -228 GB | ffffffc6feffffff | 2 MB | fixmap
|
ffffffc6fea00000 | -228 GB | ffffffc6feffffff | 6 MB | fixmap
|
||||||
ffffffc6ff000000 | -228 GB | ffffffc6ffffffff | 16 MB | PCI io
|
ffffffc6ff000000 | -228 GB | ffffffc6ffffffff | 16 MB | PCI io
|
||||||
ffffffc700000000 | -228 GB | ffffffc7ffffffff | 4 GB | vmemmap
|
ffffffc700000000 | -228 GB | ffffffc7ffffffff | 4 GB | vmemmap
|
||||||
ffffffc800000000 | -224 GB | ffffffd7ffffffff | 64 GB | vmalloc/ioremap space
|
ffffffc800000000 | -224 GB | ffffffd7ffffffff | 64 GB | vmalloc/ioremap space
|
||||||
|
|
@ -83,7 +83,7 @@ RISC-V Linux Kernel SV48
|
||||||
| Kernel-space virtual memory, shared between all processes:
|
| Kernel-space virtual memory, shared between all processes:
|
||||||
____________________________________________________________|___________________________________________________________
|
____________________________________________________________|___________________________________________________________
|
||||||
| | | |
|
| | | |
|
||||||
ffff8d7ffee00000 | -114.5 TB | ffff8d7ffeffffff | 2 MB | fixmap
|
ffff8d7ffea00000 | -114.5 TB | ffff8d7ffeffffff | 6 MB | fixmap
|
||||||
ffff8d7fff000000 | -114.5 TB | ffff8d7fffffffff | 16 MB | PCI io
|
ffff8d7fff000000 | -114.5 TB | ffff8d7fffffffff | 16 MB | PCI io
|
||||||
ffff8d8000000000 | -114.5 TB | ffff8f7fffffffff | 2 TB | vmemmap
|
ffff8d8000000000 | -114.5 TB | ffff8f7fffffffff | 2 TB | vmemmap
|
||||||
ffff8f8000000000 | -112.5 TB | ffffaf7fffffffff | 32 TB | vmalloc/ioremap space
|
ffff8f8000000000 | -112.5 TB | ffffaf7fffffffff | 32 TB | vmalloc/ioremap space
|
||||||
|
|
@ -119,7 +119,7 @@ RISC-V Linux Kernel SV57
|
||||||
| Kernel-space virtual memory, shared between all processes:
|
| Kernel-space virtual memory, shared between all processes:
|
||||||
____________________________________________________________|___________________________________________________________
|
____________________________________________________________|___________________________________________________________
|
||||||
| | | |
|
| | | |
|
||||||
ff1bfffffee00000 | -57 PB | ff1bfffffeffffff | 2 MB | fixmap
|
ff1bfffffea00000 | -57 PB | ff1bfffffeffffff | 6 MB | fixmap
|
||||||
ff1bffffff000000 | -57 PB | ff1bffffffffffff | 16 MB | PCI io
|
ff1bffffff000000 | -57 PB | ff1bffffffffffff | 16 MB | PCI io
|
||||||
ff1c000000000000 | -57 PB | ff1fffffffffffff | 1 PB | vmemmap
|
ff1c000000000000 | -57 PB | ff1fffffffffffff | 1 PB | vmemmap
|
||||||
ff20000000000000 | -56 PB | ff5fffffffffffff | 16 PB | vmalloc/ioremap space
|
ff20000000000000 | -56 PB | ff5fffffffffffff | 16 PB | vmalloc/ioremap space
|
||||||
|
|
|
||||||
|
|
@ -15,7 +15,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file.
|
||||||
============ ================ ==============================================
|
============ ================ ==============================================
|
||||||
Architecture Level of support Constraints
|
Architecture Level of support Constraints
|
||||||
============ ================ ==============================================
|
============ ================ ==============================================
|
||||||
``x86`` Maintained ``x86_64`` only.
|
|
||||||
``um`` Maintained ``x86_64`` only.
|
``um`` Maintained ``x86_64`` only.
|
||||||
|
``x86`` Maintained ``x86_64`` only.
|
||||||
============ ================ ==============================================
|
============ ================ ==============================================
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -704,7 +704,7 @@ ref
|
||||||
no-jd
|
no-jd
|
||||||
BIOS setup but without jack-detection
|
BIOS setup but without jack-detection
|
||||||
intel
|
intel
|
||||||
Intel DG45* mobos
|
Intel D*45* mobos
|
||||||
dell-m6-amic
|
dell-m6-amic
|
||||||
Dell desktops/laptops with analog mics
|
Dell desktops/laptops with analog mics
|
||||||
dell-m6-dmic
|
dell-m6-dmic
|
||||||
|
|
|
||||||
|
|
@ -14623,6 +14623,7 @@ F: net/netlabel/
|
||||||
|
|
||||||
NETWORKING [MPTCP]
|
NETWORKING [MPTCP]
|
||||||
M: Matthieu Baerts <matthieu.baerts@tessares.net>
|
M: Matthieu Baerts <matthieu.baerts@tessares.net>
|
||||||
|
M: Mat Martineau <martineau@kernel.org>
|
||||||
L: netdev@vger.kernel.org
|
L: netdev@vger.kernel.org
|
||||||
L: mptcp@lists.linux.dev
|
L: mptcp@lists.linux.dev
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
|
||||||
2
Makefile
2
Makefile
|
|
@ -2,7 +2,7 @@
|
||||||
VERSION = 6
|
VERSION = 6
|
||||||
PATCHLEVEL = 3
|
PATCHLEVEL = 3
|
||||||
SUBLEVEL = 0
|
SUBLEVEL = 0
|
||||||
EXTRAVERSION = -rc6
|
EXTRAVERSION = -rc7
|
||||||
NAME = Hurr durr I'ma ninja sloth
|
NAME = Hurr durr I'ma ninja sloth
|
||||||
|
|
||||||
# *DOCUMENTATION*
|
# *DOCUMENTATION*
|
||||||
|
|
|
||||||
|
|
@ -33,18 +33,12 @@
|
||||||
self-powered;
|
self-powered;
|
||||||
type = "micro";
|
type = "micro";
|
||||||
|
|
||||||
ports {
|
port {
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
port@0 {
|
|
||||||
reg = <0>;
|
|
||||||
usb_dr_connector: endpoint {
|
usb_dr_connector: endpoint {
|
||||||
remote-endpoint = <&usb1_drd_sw>;
|
remote-endpoint = <&usb1_drd_sw>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
|
||||||
|
|
||||||
gpio-keys {
|
gpio-keys {
|
||||||
compatible = "gpio-keys";
|
compatible = "gpio-keys";
|
||||||
|
|
|
||||||
|
|
@ -118,8 +118,6 @@
|
||||||
reg = <0x62>;
|
reg = <0x62>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_epdpmic>;
|
pinctrl-0 = <&pinctrl_epdpmic>;
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
epd-pwr-good-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
|
epd-pwr-good-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -942,7 +942,7 @@
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
spdif: sound@ff88b0000 {
|
spdif: sound@ff8b0000 {
|
||||||
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
|
compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
|
||||||
reg = <0x0 0xff8b0000 0x0 0x10000>;
|
reg = <0x0 0xff8b0000 0x0 0x10000>;
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
|
|
|
||||||
|
|
@ -76,7 +76,7 @@ CONFIG_RFKILL=y
|
||||||
CONFIG_RFKILL_INPUT=y
|
CONFIG_RFKILL_INPUT=y
|
||||||
CONFIG_PCI=y
|
CONFIG_PCI=y
|
||||||
CONFIG_PCI_MSI=y
|
CONFIG_PCI_MSI=y
|
||||||
CONFIG_PCI_IMX6=y
|
CONFIG_PCI_IMX6_HOST=y
|
||||||
CONFIG_DEVTMPFS=y
|
CONFIG_DEVTMPFS=y
|
||||||
CONFIG_DEVTMPFS_MOUNT=y
|
CONFIG_DEVTMPFS_MOUNT=y
|
||||||
# CONFIG_STANDALONE is not set
|
# CONFIG_STANDALONE is not set
|
||||||
|
|
|
||||||
|
|
@ -1571,15 +1571,20 @@
|
||||||
|
|
||||||
dmc: bus@38000 {
|
dmc: bus@38000 {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
reg = <0x0 0x38000 0x0 0x400>;
|
|
||||||
#address-cells = <2>;
|
#address-cells = <2>;
|
||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
|
ranges = <0x0 0x0 0x0 0x38000 0x0 0x2000>;
|
||||||
|
|
||||||
canvas: video-lut@48 {
|
canvas: video-lut@48 {
|
||||||
compatible = "amlogic,canvas";
|
compatible = "amlogic,canvas";
|
||||||
reg = <0x0 0x48 0x0 0x14>;
|
reg = <0x0 0x48 0x0 0x14>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
pmu: pmu@80 {
|
||||||
|
reg = <0x0 0x80 0x0 0x40>,
|
||||||
|
<0x0 0xc00 0x0 0x40>;
|
||||||
|
interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
usb2_phy1: phy@3a000 {
|
usb2_phy1: phy@3a000 {
|
||||||
|
|
@ -1705,12 +1710,6 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
pmu: pmu@ff638000 {
|
|
||||||
reg = <0x0 0xff638000 0x0 0x100>,
|
|
||||||
<0x0 0xff638c00 0x0 0x100>;
|
|
||||||
interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
|
|
||||||
};
|
|
||||||
|
|
||||||
aobus: bus@ff800000 {
|
aobus: bus@ff800000 {
|
||||||
compatible = "simple-bus";
|
compatible = "simple-bus";
|
||||||
reg = <0x0 0xff800000 0x0 0x100000>;
|
reg = <0x0 0xff800000 0x0 0x100000>;
|
||||||
|
|
|
||||||
|
|
@ -194,7 +194,7 @@
|
||||||
rohm,reset-snvs-powered;
|
rohm,reset-snvs-powered;
|
||||||
|
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
clocks = <&osc_32k 0>;
|
clocks = <&osc_32k>;
|
||||||
clock-output-names = "clk-32k-out";
|
clock-output-names = "clk-32k-out";
|
||||||
|
|
||||||
regulators {
|
regulators {
|
||||||
|
|
|
||||||
|
|
@ -99,7 +99,7 @@
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
|
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
|
||||||
off-on-delay = <500000>;
|
off-on-delay-us = <500000>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_reg_eth>;
|
pinctrl-0 = <&pinctrl_reg_eth>;
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
|
|
@ -139,7 +139,7 @@
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
/* Verdin SD_1_PWR_EN (SODIMM 76) */
|
/* Verdin SD_1_PWR_EN (SODIMM 76) */
|
||||||
gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
|
gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
|
||||||
off-on-delay = <100000>;
|
off-on-delay-us = <100000>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
|
pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
|
||||||
regulator-max-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
||||||
|
|
|
||||||
|
|
@ -10,7 +10,7 @@
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
gpio = <&gpio_expander_21 4 GPIO_ACTIVE_HIGH>; /* ETH_PWR_EN */
|
gpio = <&gpio_expander_21 4 GPIO_ACTIVE_HIGH>; /* ETH_PWR_EN */
|
||||||
off-on-delay = <500000>;
|
off-on-delay-us = <500000>;
|
||||||
regulator-max-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
regulator-name = "+V3.3_ETH";
|
regulator-name = "+V3.3_ETH";
|
||||||
|
|
|
||||||
|
|
@ -87,7 +87,7 @@
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
|
gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; /* PMIC_EN_ETH */
|
||||||
off-on-delay = <500000>;
|
off-on-delay-us = <500000>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_reg_eth>;
|
pinctrl-0 = <&pinctrl_reg_eth>;
|
||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
|
|
@ -128,7 +128,7 @@
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
/* Verdin SD_1_PWR_EN (SODIMM 76) */
|
/* Verdin SD_1_PWR_EN (SODIMM 76) */
|
||||||
gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
|
gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>;
|
||||||
off-on-delay = <100000>;
|
off-on-delay-us = <100000>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
|
pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
|
||||||
regulator-max-microvolt = <3300000>;
|
regulator-max-microvolt = <3300000>;
|
||||||
|
|
|
||||||
|
|
@ -1128,7 +1128,7 @@
|
||||||
|
|
||||||
lcdif2: display-controller@32e90000 {
|
lcdif2: display-controller@32e90000 {
|
||||||
compatible = "fsl,imx8mp-lcdif";
|
compatible = "fsl,imx8mp-lcdif";
|
||||||
reg = <0x32e90000 0x238>;
|
reg = <0x32e90000 0x10000>;
|
||||||
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
|
clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>,
|
||||||
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
|
<&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
|
||||||
|
|
|
||||||
|
|
@ -62,11 +62,11 @@
|
||||||
perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
|
perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&pcie_phy0 {
|
&pcie_qmp0 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pcie_phy1 {
|
&pcie_qmp1 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -48,11 +48,11 @@
|
||||||
perst-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
|
perst-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&pcie_phy0 {
|
&pcie_qmp0 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
&pcie_phy1 {
|
&pcie_qmp1 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1012,7 +1012,7 @@
|
||||||
left_spkr: speaker@0,3 {
|
left_spkr: speaker@0,3 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
reg = <0 3>;
|
reg = <0 3>;
|
||||||
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrLeft";
|
sound-name-prefix = "SpkrLeft";
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
|
|
@ -1021,7 +1021,7 @@
|
||||||
right_spkr: speaker@0,4 {
|
right_spkr: speaker@0,4 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
reg = <0 4>;
|
reg = <0 4>;
|
||||||
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrRight";
|
sound-name-prefix = "SpkrRight";
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
|
|
|
||||||
|
|
@ -464,7 +464,7 @@ ap_i2c_tpm: &i2c14 {
|
||||||
|
|
||||||
&mdss_dp_out {
|
&mdss_dp_out {
|
||||||
data-lanes = <0 1>;
|
data-lanes = <0 1>;
|
||||||
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
|
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&mdss_mdp {
|
&mdss_mdp {
|
||||||
|
|
|
||||||
|
|
@ -59,8 +59,9 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
pmk8280_pon: pon@1300 {
|
pmk8280_pon: pon@1300 {
|
||||||
compatible = "qcom,pm8998-pon";
|
compatible = "qcom,pmk8350-pon";
|
||||||
reg = <0x1300>;
|
reg = <0x1300>, <0x800>;
|
||||||
|
reg-names = "hlos", "pbs";
|
||||||
|
|
||||||
pmk8280_pon_pwrkey: pwrkey {
|
pmk8280_pon_pwrkey: pwrkey {
|
||||||
compatible = "qcom,pmk8350-pwrkey";
|
compatible = "qcom,pmk8350-pwrkey";
|
||||||
|
|
|
||||||
|
|
@ -753,7 +753,7 @@
|
||||||
left_spkr: speaker@0,3 {
|
left_spkr: speaker@0,3 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
reg = <0 3>;
|
reg = <0 3>;
|
||||||
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrLeft";
|
sound-name-prefix = "SpkrLeft";
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
|
|
@ -761,7 +761,7 @@
|
||||||
|
|
||||||
right_spkr: speaker@0,4 {
|
right_spkr: speaker@0,4 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>;
|
||||||
reg = <0 4>;
|
reg = <0 4>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrRight";
|
sound-name-prefix = "SpkrRight";
|
||||||
|
|
|
||||||
|
|
@ -662,7 +662,7 @@
|
||||||
left_spkr: speaker@0,3 {
|
left_spkr: speaker@0,3 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
reg = <0 3>;
|
reg = <0 3>;
|
||||||
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrLeft";
|
sound-name-prefix = "SpkrLeft";
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
|
|
@ -670,7 +670,7 @@
|
||||||
|
|
||||||
right_spkr: speaker@0,4 {
|
right_spkr: speaker@0,4 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>;
|
||||||
reg = <0 4>;
|
reg = <0 4>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrRight";
|
sound-name-prefix = "SpkrRight";
|
||||||
|
|
|
||||||
|
|
@ -764,7 +764,7 @@
|
||||||
left_spkr: speaker@0,3 {
|
left_spkr: speaker@0,3 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
reg = <0 3>;
|
reg = <0 3>;
|
||||||
powerdown-gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrLeft";
|
sound-name-prefix = "SpkrLeft";
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
|
|
@ -773,7 +773,7 @@
|
||||||
right_spkr: speaker@0,4 {
|
right_spkr: speaker@0,4 {
|
||||||
compatible = "sdw10217211000";
|
compatible = "sdw10217211000";
|
||||||
reg = <0 4>;
|
reg = <0 4>;
|
||||||
powerdown-gpios = <&tlmm 127 GPIO_ACTIVE_HIGH>;
|
powerdown-gpios = <&tlmm 127 GPIO_ACTIVE_LOW>;
|
||||||
#thermal-sensor-cells = <0>;
|
#thermal-sensor-cells = <0>;
|
||||||
sound-name-prefix = "SpkrRight";
|
sound-name-prefix = "SpkrRight";
|
||||||
#sound-dai-cells = <0>;
|
#sound-dai-cells = <0>;
|
||||||
|
|
|
||||||
|
|
@ -24,6 +24,8 @@
|
||||||
|
|
||||||
&internal_display {
|
&internal_display {
|
||||||
compatible = "elida,kd35t133";
|
compatible = "elida,kd35t133";
|
||||||
|
iovcc-supply = <&vcc_lcd>;
|
||||||
|
vdd-supply = <&vcc_lcd>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&pwm0 {
|
&pwm0 {
|
||||||
|
|
|
||||||
|
|
@ -235,10 +235,8 @@
|
||||||
internal_display: panel@0 {
|
internal_display: panel@0 {
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
backlight = <&backlight>;
|
backlight = <&backlight>;
|
||||||
iovcc-supply = <&vcc_lcd>;
|
|
||||||
reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
|
reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
|
||||||
rotation = <270>;
|
rotation = <270>;
|
||||||
vdd-supply = <&vcc_lcd>;
|
|
||||||
|
|
||||||
port {
|
port {
|
||||||
mipi_in_panel: endpoint {
|
mipi_in_panel: endpoint {
|
||||||
|
|
|
||||||
|
|
@ -83,6 +83,8 @@
|
||||||
|
|
||||||
&internal_display {
|
&internal_display {
|
||||||
compatible = "elida,kd35t133";
|
compatible = "elida,kd35t133";
|
||||||
|
iovcc-supply = <&vcc_lcd>;
|
||||||
|
vdd-supply = <&vcc_lcd>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&rk817 {
|
&rk817 {
|
||||||
|
|
|
||||||
|
|
@ -59,6 +59,8 @@
|
||||||
|
|
||||||
&internal_display {
|
&internal_display {
|
||||||
compatible = "elida,kd35t133";
|
compatible = "elida,kd35t133";
|
||||||
|
iovcc-supply = <&vcc_lcd>;
|
||||||
|
vdd-supply = <&vcc_lcd>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&rk817_charger {
|
&rk817_charger {
|
||||||
|
|
|
||||||
|
|
@ -61,7 +61,6 @@
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&bl_en>;
|
pinctrl-0 = <&bl_en>;
|
||||||
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
|
pwms = <&pwm0 0 1000000 PWM_POLARITY_INVERTED>;
|
||||||
pwm-delay-us = <10000>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
emmc_pwrseq: emmc-pwrseq {
|
emmc_pwrseq: emmc-pwrseq {
|
||||||
|
|
|
||||||
|
|
@ -198,7 +198,6 @@
|
||||||
power-supply = <&pp3300_disp>;
|
power-supply = <&pp3300_disp>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&bl_en>;
|
pinctrl-0 = <&bl_en>;
|
||||||
pwm-delay-us = <10000>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio_keys: gpio-keys {
|
gpio_keys: gpio-keys {
|
||||||
|
|
|
||||||
|
|
@ -167,7 +167,6 @@
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&bl_en>;
|
pinctrl-0 = <&bl_en>;
|
||||||
pwms = <&pwm1 0 1000000 0>;
|
pwms = <&pwm1 0 1000000 0>;
|
||||||
pwm-delay-us = <10000>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
dmic: dmic {
|
dmic: dmic {
|
||||||
|
|
|
||||||
|
|
@ -50,22 +50,12 @@
|
||||||
pinctrl-0 = <&panel_en_pin>;
|
pinctrl-0 = <&panel_en_pin>;
|
||||||
power-supply = <&vcc3v3_panel>;
|
power-supply = <&vcc3v3_panel>;
|
||||||
|
|
||||||
ports {
|
port {
|
||||||
#address-cells = <1>;
|
panel_in_edp: endpoint {
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
port@0 {
|
|
||||||
reg = <0>;
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
panel_in_edp: endpoint@0 {
|
|
||||||
reg = <0>;
|
|
||||||
remote-endpoint = <&edp_out_panel>;
|
remote-endpoint = <&edp_out_panel>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Use separate nodes for gpio-keys to allow for selective deactivation
|
* Use separate nodes for gpio-keys to allow for selective deactivation
|
||||||
|
|
@ -943,7 +933,7 @@
|
||||||
disable-wp;
|
disable-wp;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
|
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
|
||||||
sd-uhs-sdr104;
|
sd-uhs-sdr50;
|
||||||
vmmc-supply = <&vcc3v0_sd>;
|
vmmc-supply = <&vcc3v0_sd>;
|
||||||
vqmmc-supply = <&vcc_sdio>;
|
vqmmc-supply = <&vcc_sdio>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
|
||||||
|
|
@ -647,19 +647,13 @@
|
||||||
avdd-supply = <&avdd>;
|
avdd-supply = <&avdd>;
|
||||||
backlight = <&backlight>;
|
backlight = <&backlight>;
|
||||||
dvdd-supply = <&vcc3v3_s0>;
|
dvdd-supply = <&vcc3v3_s0>;
|
||||||
ports {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
port@0 {
|
|
||||||
reg = <0>;
|
|
||||||
|
|
||||||
|
port {
|
||||||
mipi_in_panel: endpoint {
|
mipi_in_panel: endpoint {
|
||||||
remote-endpoint = <&mipi_out_panel>;
|
remote-endpoint = <&mipi_out_panel>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
&pcie0 {
|
&pcie0 {
|
||||||
|
|
|
||||||
|
|
@ -552,7 +552,7 @@
|
||||||
<0x0 0xfff10000 0 0x10000>, /* GICH */
|
<0x0 0xfff10000 0 0x10000>, /* GICH */
|
||||||
<0x0 0xfff20000 0 0x10000>; /* GICV */
|
<0x0 0xfff20000 0 0x10000>; /* GICV */
|
||||||
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
|
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||||
its: interrupt-controller@fee20000 {
|
its: msi-controller@fee20000 {
|
||||||
compatible = "arm,gic-v3-its";
|
compatible = "arm,gic-v3-its";
|
||||||
msi-controller;
|
msi-controller;
|
||||||
#msi-cells = <1>;
|
#msi-cells = <1>;
|
||||||
|
|
|
||||||
|
|
@ -16,8 +16,10 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&cru {
|
&cru {
|
||||||
assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
|
||||||
assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
|
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
||||||
|
assigned-clock-rates = <32768>, <1200000000>,
|
||||||
|
<200000000>, <241500000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&gpio_keys_control {
|
&gpio_keys_control {
|
||||||
|
|
|
||||||
|
|
@ -105,8 +105,10 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&cru {
|
&cru {
|
||||||
assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
|
||||||
assigned-clock-rates = <1200000000>, <200000000>, <500000000>;
|
<&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
|
||||||
|
assigned-clock-rates = <32768>, <1200000000>,
|
||||||
|
<200000000>, <500000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
&dsi_dphy0 {
|
&dsi_dphy0 {
|
||||||
|
|
|
||||||
|
|
@ -598,7 +598,7 @@
|
||||||
non-removable;
|
non-removable;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
||||||
sd-uhs-sdr104;
|
sd-uhs-sdr50;
|
||||||
vmmc-supply = <&vcc3v3_sys>;
|
vmmc-supply = <&vcc3v3_sys>;
|
||||||
vqmmc-supply = <&vcc_1v8>;
|
vqmmc-supply = <&vcc_1v8>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
|
||||||
|
|
@ -222,6 +222,7 @@
|
||||||
cache-size = <131072>;
|
cache-size = <131072>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <512>;
|
cache-sets = <512>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -230,6 +231,7 @@
|
||||||
cache-size = <131072>;
|
cache-size = <131072>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <512>;
|
cache-sets = <512>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -238,6 +240,7 @@
|
||||||
cache-size = <131072>;
|
cache-size = <131072>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <512>;
|
cache-sets = <512>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -246,6 +249,7 @@
|
||||||
cache-size = <131072>;
|
cache-size = <131072>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <512>;
|
cache-sets = <512>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -254,6 +258,7 @@
|
||||||
cache-size = <524288>;
|
cache-size = <524288>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <1024>;
|
cache-sets = <1024>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -262,6 +267,7 @@
|
||||||
cache-size = <524288>;
|
cache-size = <524288>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <1024>;
|
cache-sets = <1024>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -270,6 +276,7 @@
|
||||||
cache-size = <524288>;
|
cache-size = <524288>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <1024>;
|
cache-sets = <1024>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -278,6 +285,7 @@
|
||||||
cache-size = <524288>;
|
cache-size = <524288>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <1024>;
|
cache-sets = <1024>;
|
||||||
|
cache-level = <2>;
|
||||||
next-level-cache = <&l3_cache>;
|
next-level-cache = <&l3_cache>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -286,6 +294,7 @@
|
||||||
cache-size = <3145728>;
|
cache-size = <3145728>;
|
||||||
cache-line-size = <64>;
|
cache-line-size = <64>;
|
||||||
cache-sets = <4096>;
|
cache-sets = <4096>;
|
||||||
|
cache-level = <3>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -447,6 +447,22 @@ config ARCH_IOREMAP
|
||||||
protection support. However, you can enable LoongArch DMW-based
|
protection support. However, you can enable LoongArch DMW-based
|
||||||
ioremap() for better performance.
|
ioremap() for better performance.
|
||||||
|
|
||||||
|
config ARCH_WRITECOMBINE
|
||||||
|
bool "Enable WriteCombine (WUC) for ioremap()"
|
||||||
|
help
|
||||||
|
LoongArch maintains cache coherency in hardware, but when paired
|
||||||
|
with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
|
||||||
|
is similar to WriteCombine) is out of the scope of cache coherency
|
||||||
|
machanism for PCIe devices (this is a PCIe protocol violation, which
|
||||||
|
may be fixed in newer chipsets).
|
||||||
|
|
||||||
|
This means WUC can only used for write-only memory regions now, so
|
||||||
|
this option is disabled by default, making WUC silently fallback to
|
||||||
|
SUC for ioremap(). You can enable this option if the kernel is ensured
|
||||||
|
to run on hardware without this bug.
|
||||||
|
|
||||||
|
You can override this setting via writecombine=on/off boot parameter.
|
||||||
|
|
||||||
config ARCH_STRICT_ALIGN
|
config ARCH_STRICT_ALIGN
|
||||||
bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
|
bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
|
||||||
default y
|
default y
|
||||||
|
|
|
||||||
|
|
@ -41,8 +41,11 @@ extern void loongarch_suspend_enter(void);
|
||||||
|
|
||||||
static inline unsigned long acpi_get_wakeup_address(void)
|
static inline unsigned long acpi_get_wakeup_address(void)
|
||||||
{
|
{
|
||||||
|
#ifdef CONFIG_SUSPEND
|
||||||
extern void loongarch_wakeup_start(void);
|
extern void loongarch_wakeup_start(void);
|
||||||
return (unsigned long)loongarch_wakeup_start;
|
return (unsigned long)loongarch_wakeup_start;
|
||||||
|
#endif
|
||||||
|
return 0UL;
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _ASM_LOONGARCH_ACPI_H */
|
#endif /* _ASM_LOONGARCH_ACPI_H */
|
||||||
|
|
|
||||||
|
|
@ -71,9 +71,9 @@ extern unsigned long vm_map_base;
|
||||||
#define _ATYPE32_ int
|
#define _ATYPE32_ int
|
||||||
#define _ATYPE64_ __s64
|
#define _ATYPE64_ __s64
|
||||||
#ifdef CONFIG_64BIT
|
#ifdef CONFIG_64BIT
|
||||||
#define _CONST64_(x) x ## L
|
#define _CONST64_(x) x ## UL
|
||||||
#else
|
#else
|
||||||
#define _CONST64_(x) x ## LL
|
#define _CONST64_(x) x ## ULL
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -13,7 +13,6 @@ const char *get_system_type(void);
|
||||||
extern void init_environ(void);
|
extern void init_environ(void);
|
||||||
extern void memblock_init(void);
|
extern void memblock_init(void);
|
||||||
extern void platform_init(void);
|
extern void platform_init(void);
|
||||||
extern void plat_swiotlb_setup(void);
|
|
||||||
extern int __init init_numa_memory(void);
|
extern int __init init_numa_memory(void);
|
||||||
|
|
||||||
struct loongson_board_info {
|
struct loongson_board_info {
|
||||||
|
|
|
||||||
|
|
@ -42,6 +42,7 @@
|
||||||
#define cpu_has_fpu cpu_opt(LOONGARCH_CPU_FPU)
|
#define cpu_has_fpu cpu_opt(LOONGARCH_CPU_FPU)
|
||||||
#define cpu_has_lsx cpu_opt(LOONGARCH_CPU_LSX)
|
#define cpu_has_lsx cpu_opt(LOONGARCH_CPU_LSX)
|
||||||
#define cpu_has_lasx cpu_opt(LOONGARCH_CPU_LASX)
|
#define cpu_has_lasx cpu_opt(LOONGARCH_CPU_LASX)
|
||||||
|
#define cpu_has_crc32 cpu_opt(LOONGARCH_CPU_CRC32)
|
||||||
#define cpu_has_complex cpu_opt(LOONGARCH_CPU_COMPLEX)
|
#define cpu_has_complex cpu_opt(LOONGARCH_CPU_COMPLEX)
|
||||||
#define cpu_has_crypto cpu_opt(LOONGARCH_CPU_CRYPTO)
|
#define cpu_has_crypto cpu_opt(LOONGARCH_CPU_CRYPTO)
|
||||||
#define cpu_has_lvz cpu_opt(LOONGARCH_CPU_LVZ)
|
#define cpu_has_lvz cpu_opt(LOONGARCH_CPU_LVZ)
|
||||||
|
|
|
||||||
|
|
@ -78,25 +78,26 @@ enum cpu_type_enum {
|
||||||
#define CPU_FEATURE_FPU 3 /* CPU has FPU */
|
#define CPU_FEATURE_FPU 3 /* CPU has FPU */
|
||||||
#define CPU_FEATURE_LSX 4 /* CPU has LSX (128-bit SIMD) */
|
#define CPU_FEATURE_LSX 4 /* CPU has LSX (128-bit SIMD) */
|
||||||
#define CPU_FEATURE_LASX 5 /* CPU has LASX (256-bit SIMD) */
|
#define CPU_FEATURE_LASX 5 /* CPU has LASX (256-bit SIMD) */
|
||||||
#define CPU_FEATURE_COMPLEX 6 /* CPU has Complex instructions */
|
#define CPU_FEATURE_CRC32 6 /* CPU has CRC32 instructions */
|
||||||
#define CPU_FEATURE_CRYPTO 7 /* CPU has Crypto instructions */
|
#define CPU_FEATURE_COMPLEX 7 /* CPU has Complex instructions */
|
||||||
#define CPU_FEATURE_LVZ 8 /* CPU has Virtualization extension */
|
#define CPU_FEATURE_CRYPTO 8 /* CPU has Crypto instructions */
|
||||||
#define CPU_FEATURE_LBT_X86 9 /* CPU has X86 Binary Translation */
|
#define CPU_FEATURE_LVZ 9 /* CPU has Virtualization extension */
|
||||||
#define CPU_FEATURE_LBT_ARM 10 /* CPU has ARM Binary Translation */
|
#define CPU_FEATURE_LBT_X86 10 /* CPU has X86 Binary Translation */
|
||||||
#define CPU_FEATURE_LBT_MIPS 11 /* CPU has MIPS Binary Translation */
|
#define CPU_FEATURE_LBT_ARM 11 /* CPU has ARM Binary Translation */
|
||||||
#define CPU_FEATURE_TLB 12 /* CPU has TLB */
|
#define CPU_FEATURE_LBT_MIPS 12 /* CPU has MIPS Binary Translation */
|
||||||
#define CPU_FEATURE_CSR 13 /* CPU has CSR */
|
#define CPU_FEATURE_TLB 13 /* CPU has TLB */
|
||||||
#define CPU_FEATURE_WATCH 14 /* CPU has watchpoint registers */
|
#define CPU_FEATURE_CSR 14 /* CPU has CSR */
|
||||||
#define CPU_FEATURE_VINT 15 /* CPU has vectored interrupts */
|
#define CPU_FEATURE_WATCH 15 /* CPU has watchpoint registers */
|
||||||
#define CPU_FEATURE_CSRIPI 16 /* CPU has CSR-IPI */
|
#define CPU_FEATURE_VINT 16 /* CPU has vectored interrupts */
|
||||||
#define CPU_FEATURE_EXTIOI 17 /* CPU has EXT-IOI */
|
#define CPU_FEATURE_CSRIPI 17 /* CPU has CSR-IPI */
|
||||||
#define CPU_FEATURE_PREFETCH 18 /* CPU has prefetch instructions */
|
#define CPU_FEATURE_EXTIOI 18 /* CPU has EXT-IOI */
|
||||||
#define CPU_FEATURE_PMP 19 /* CPU has perfermance counter */
|
#define CPU_FEATURE_PREFETCH 19 /* CPU has prefetch instructions */
|
||||||
#define CPU_FEATURE_SCALEFREQ 20 /* CPU supports cpufreq scaling */
|
#define CPU_FEATURE_PMP 20 /* CPU has perfermance counter */
|
||||||
#define CPU_FEATURE_FLATMODE 21 /* CPU has flat mode */
|
#define CPU_FEATURE_SCALEFREQ 21 /* CPU supports cpufreq scaling */
|
||||||
#define CPU_FEATURE_EIODECODE 22 /* CPU has EXTIOI interrupt pin decode mode */
|
#define CPU_FEATURE_FLATMODE 22 /* CPU has flat mode */
|
||||||
#define CPU_FEATURE_GUESTID 23 /* CPU has GuestID feature */
|
#define CPU_FEATURE_EIODECODE 23 /* CPU has EXTIOI interrupt pin decode mode */
|
||||||
#define CPU_FEATURE_HYPERVISOR 24 /* CPU has hypervisor (running in VM) */
|
#define CPU_FEATURE_GUESTID 24 /* CPU has GuestID feature */
|
||||||
|
#define CPU_FEATURE_HYPERVISOR 25 /* CPU has hypervisor (running in VM) */
|
||||||
|
|
||||||
#define LOONGARCH_CPU_CPUCFG BIT_ULL(CPU_FEATURE_CPUCFG)
|
#define LOONGARCH_CPU_CPUCFG BIT_ULL(CPU_FEATURE_CPUCFG)
|
||||||
#define LOONGARCH_CPU_LAM BIT_ULL(CPU_FEATURE_LAM)
|
#define LOONGARCH_CPU_LAM BIT_ULL(CPU_FEATURE_LAM)
|
||||||
|
|
@ -104,6 +105,7 @@ enum cpu_type_enum {
|
||||||
#define LOONGARCH_CPU_FPU BIT_ULL(CPU_FEATURE_FPU)
|
#define LOONGARCH_CPU_FPU BIT_ULL(CPU_FEATURE_FPU)
|
||||||
#define LOONGARCH_CPU_LSX BIT_ULL(CPU_FEATURE_LSX)
|
#define LOONGARCH_CPU_LSX BIT_ULL(CPU_FEATURE_LSX)
|
||||||
#define LOONGARCH_CPU_LASX BIT_ULL(CPU_FEATURE_LASX)
|
#define LOONGARCH_CPU_LASX BIT_ULL(CPU_FEATURE_LASX)
|
||||||
|
#define LOONGARCH_CPU_CRC32 BIT_ULL(CPU_FEATURE_CRC32)
|
||||||
#define LOONGARCH_CPU_COMPLEX BIT_ULL(CPU_FEATURE_COMPLEX)
|
#define LOONGARCH_CPU_COMPLEX BIT_ULL(CPU_FEATURE_COMPLEX)
|
||||||
#define LOONGARCH_CPU_CRYPTO BIT_ULL(CPU_FEATURE_CRYPTO)
|
#define LOONGARCH_CPU_CRYPTO BIT_ULL(CPU_FEATURE_CRYPTO)
|
||||||
#define LOONGARCH_CPU_LVZ BIT_ULL(CPU_FEATURE_LVZ)
|
#define LOONGARCH_CPU_LVZ BIT_ULL(CPU_FEATURE_LVZ)
|
||||||
|
|
|
||||||
|
|
@ -54,8 +54,10 @@ static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
|
||||||
* @offset: bus address of the memory
|
* @offset: bus address of the memory
|
||||||
* @size: size of the resource to map
|
* @size: size of the resource to map
|
||||||
*/
|
*/
|
||||||
|
extern pgprot_t pgprot_wc;
|
||||||
|
|
||||||
#define ioremap_wc(offset, size) \
|
#define ioremap_wc(offset, size) \
|
||||||
ioremap_prot((offset), (size), pgprot_val(PAGE_KERNEL_WUC))
|
ioremap_prot((offset), (size), pgprot_val(pgprot_wc))
|
||||||
|
|
||||||
#define ioremap_cache(offset, size) \
|
#define ioremap_cache(offset, size) \
|
||||||
ioremap_prot((offset), (size), pgprot_val(PAGE_KERNEL))
|
ioremap_prot((offset), (size), pgprot_val(PAGE_KERNEL))
|
||||||
|
|
|
||||||
|
|
@ -117,7 +117,7 @@ static inline u32 read_cpucfg(u32 reg)
|
||||||
#define CPUCFG1_EP BIT(22)
|
#define CPUCFG1_EP BIT(22)
|
||||||
#define CPUCFG1_RPLV BIT(23)
|
#define CPUCFG1_RPLV BIT(23)
|
||||||
#define CPUCFG1_HUGEPG BIT(24)
|
#define CPUCFG1_HUGEPG BIT(24)
|
||||||
#define CPUCFG1_IOCSRBRD BIT(25)
|
#define CPUCFG1_CRC32 BIT(25)
|
||||||
#define CPUCFG1_MSGINT BIT(26)
|
#define CPUCFG1_MSGINT BIT(26)
|
||||||
|
|
||||||
#define LOONGARCH_CPUCFG2 0x2
|
#define LOONGARCH_CPUCFG2 0x2
|
||||||
|
|
@ -423,9 +423,9 @@ static __always_inline void iocsr_write64(u64 val, u32 reg)
|
||||||
#define CSR_ASID_ASID_WIDTH 10
|
#define CSR_ASID_ASID_WIDTH 10
|
||||||
#define CSR_ASID_ASID (_ULCAST_(0x3ff) << CSR_ASID_ASID_SHIFT)
|
#define CSR_ASID_ASID (_ULCAST_(0x3ff) << CSR_ASID_ASID_SHIFT)
|
||||||
|
|
||||||
#define LOONGARCH_CSR_PGDL 0x19 /* Page table base address when VA[47] = 0 */
|
#define LOONGARCH_CSR_PGDL 0x19 /* Page table base address when VA[VALEN-1] = 0 */
|
||||||
|
|
||||||
#define LOONGARCH_CSR_PGDH 0x1a /* Page table base address when VA[47] = 1 */
|
#define LOONGARCH_CSR_PGDH 0x1a /* Page table base address when VA[VALEN-1] = 1 */
|
||||||
|
|
||||||
#define LOONGARCH_CSR_PGD 0x1b /* Page table base */
|
#define LOONGARCH_CSR_PGD 0x1b /* Page table base */
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -2,8 +2,8 @@
|
||||||
/* Copyright (C) 2020-2022 Loongson Technology Corporation Limited */
|
/* Copyright (C) 2020-2022 Loongson Technology Corporation Limited */
|
||||||
SECTIONS {
|
SECTIONS {
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
.got : { BYTE(0) }
|
.got 0 : { BYTE(0) }
|
||||||
.plt : { BYTE(0) }
|
.plt 0 : { BYTE(0) }
|
||||||
.plt.idx : { BYTE(0) }
|
.plt.idx 0 : { BYTE(0) }
|
||||||
.ftrace_trampoline : { BYTE(0) }
|
.ftrace_trampoline 0 : { BYTE(0) }
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -47,11 +47,12 @@ struct user_fp_state {
|
||||||
};
|
};
|
||||||
|
|
||||||
struct user_watch_state {
|
struct user_watch_state {
|
||||||
uint16_t dbg_info;
|
uint64_t dbg_info;
|
||||||
struct {
|
struct {
|
||||||
uint64_t addr;
|
uint64_t addr;
|
||||||
uint64_t mask;
|
uint64_t mask;
|
||||||
uint32_t ctrl;
|
uint32_t ctrl;
|
||||||
|
uint32_t pad;
|
||||||
} dbg_regs[8];
|
} dbg_regs[8];
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -60,7 +60,7 @@ static inline void set_elf_platform(int cpu, const char *plat)
|
||||||
|
|
||||||
/* MAP BASE */
|
/* MAP BASE */
|
||||||
unsigned long vm_map_base;
|
unsigned long vm_map_base;
|
||||||
EXPORT_SYMBOL_GPL(vm_map_base);
|
EXPORT_SYMBOL(vm_map_base);
|
||||||
|
|
||||||
static void cpu_probe_addrbits(struct cpuinfo_loongarch *c)
|
static void cpu_probe_addrbits(struct cpuinfo_loongarch *c)
|
||||||
{
|
{
|
||||||
|
|
@ -94,13 +94,18 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)
|
||||||
c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR |
|
c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR |
|
||||||
LOONGARCH_CPU_TLB | LOONGARCH_CPU_VINT | LOONGARCH_CPU_WATCH;
|
LOONGARCH_CPU_TLB | LOONGARCH_CPU_VINT | LOONGARCH_CPU_WATCH;
|
||||||
|
|
||||||
elf_hwcap = HWCAP_LOONGARCH_CPUCFG | HWCAP_LOONGARCH_CRC32;
|
elf_hwcap = HWCAP_LOONGARCH_CPUCFG;
|
||||||
|
|
||||||
config = read_cpucfg(LOONGARCH_CPUCFG1);
|
config = read_cpucfg(LOONGARCH_CPUCFG1);
|
||||||
if (config & CPUCFG1_UAL) {
|
if (config & CPUCFG1_UAL) {
|
||||||
c->options |= LOONGARCH_CPU_UAL;
|
c->options |= LOONGARCH_CPU_UAL;
|
||||||
elf_hwcap |= HWCAP_LOONGARCH_UAL;
|
elf_hwcap |= HWCAP_LOONGARCH_UAL;
|
||||||
}
|
}
|
||||||
|
if (config & CPUCFG1_CRC32) {
|
||||||
|
c->options |= LOONGARCH_CPU_CRC32;
|
||||||
|
elf_hwcap |= HWCAP_LOONGARCH_CRC32;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
config = read_cpucfg(LOONGARCH_CPUCFG2);
|
config = read_cpucfg(LOONGARCH_CPUCFG2);
|
||||||
if (config & CPUCFG2_LAM) {
|
if (config & CPUCFG2_LAM) {
|
||||||
|
|
|
||||||
|
|
@ -76,6 +76,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
||||||
if (cpu_has_fpu) seq_printf(m, " fpu");
|
if (cpu_has_fpu) seq_printf(m, " fpu");
|
||||||
if (cpu_has_lsx) seq_printf(m, " lsx");
|
if (cpu_has_lsx) seq_printf(m, " lsx");
|
||||||
if (cpu_has_lasx) seq_printf(m, " lasx");
|
if (cpu_has_lasx) seq_printf(m, " lasx");
|
||||||
|
if (cpu_has_crc32) seq_printf(m, " crc32");
|
||||||
if (cpu_has_complex) seq_printf(m, " complex");
|
if (cpu_has_complex) seq_printf(m, " complex");
|
||||||
if (cpu_has_crypto) seq_printf(m, " crypto");
|
if (cpu_has_crypto) seq_printf(m, " crypto");
|
||||||
if (cpu_has_lvz) seq_printf(m, " lvz");
|
if (cpu_has_lvz) seq_printf(m, " lvz");
|
||||||
|
|
|
||||||
|
|
@ -391,10 +391,10 @@ static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ptrace_hbp_get_resource_info(unsigned int note_type, u16 *info)
|
static int ptrace_hbp_get_resource_info(unsigned int note_type, u64 *info)
|
||||||
{
|
{
|
||||||
u8 num;
|
u8 num;
|
||||||
u16 reg = 0;
|
u64 reg = 0;
|
||||||
|
|
||||||
switch (note_type) {
|
switch (note_type) {
|
||||||
case NT_LOONGARCH_HW_BREAK:
|
case NT_LOONGARCH_HW_BREAK:
|
||||||
|
|
@ -524,15 +524,16 @@ static int ptrace_hbp_set_addr(unsigned int note_type,
|
||||||
return modify_user_hw_breakpoint(bp, &attr);
|
return modify_user_hw_breakpoint(bp, &attr);
|
||||||
}
|
}
|
||||||
|
|
||||||
#define PTRACE_HBP_CTRL_SZ sizeof(u32)
|
|
||||||
#define PTRACE_HBP_ADDR_SZ sizeof(u64)
|
#define PTRACE_HBP_ADDR_SZ sizeof(u64)
|
||||||
#define PTRACE_HBP_MASK_SZ sizeof(u64)
|
#define PTRACE_HBP_MASK_SZ sizeof(u64)
|
||||||
|
#define PTRACE_HBP_CTRL_SZ sizeof(u32)
|
||||||
|
#define PTRACE_HBP_PAD_SZ sizeof(u32)
|
||||||
|
|
||||||
static int hw_break_get(struct task_struct *target,
|
static int hw_break_get(struct task_struct *target,
|
||||||
const struct user_regset *regset,
|
const struct user_regset *regset,
|
||||||
struct membuf to)
|
struct membuf to)
|
||||||
{
|
{
|
||||||
u16 info;
|
u64 info;
|
||||||
u32 ctrl;
|
u32 ctrl;
|
||||||
u64 addr, mask;
|
u64 addr, mask;
|
||||||
int ret, idx = 0;
|
int ret, idx = 0;
|
||||||
|
|
@ -545,7 +546,7 @@ static int hw_break_get(struct task_struct *target,
|
||||||
|
|
||||||
membuf_write(&to, &info, sizeof(info));
|
membuf_write(&to, &info, sizeof(info));
|
||||||
|
|
||||||
/* (address, ctrl) registers */
|
/* (address, mask, ctrl) registers */
|
||||||
while (to.left) {
|
while (to.left) {
|
||||||
ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
|
ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
|
||||||
if (ret)
|
if (ret)
|
||||||
|
|
@ -562,6 +563,7 @@ static int hw_break_get(struct task_struct *target,
|
||||||
membuf_store(&to, addr);
|
membuf_store(&to, addr);
|
||||||
membuf_store(&to, mask);
|
membuf_store(&to, mask);
|
||||||
membuf_store(&to, ctrl);
|
membuf_store(&to, ctrl);
|
||||||
|
membuf_zero(&to, sizeof(u32));
|
||||||
idx++;
|
idx++;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -582,7 +584,7 @@ static int hw_break_set(struct task_struct *target,
|
||||||
offset = offsetof(struct user_watch_state, dbg_regs);
|
offset = offsetof(struct user_watch_state, dbg_regs);
|
||||||
user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
|
user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
|
||||||
|
|
||||||
/* (address, ctrl) registers */
|
/* (address, mask, ctrl) registers */
|
||||||
limit = regset->n * regset->size;
|
limit = regset->n * regset->size;
|
||||||
while (count && offset < limit) {
|
while (count && offset < limit) {
|
||||||
if (count < PTRACE_HBP_ADDR_SZ)
|
if (count < PTRACE_HBP_ADDR_SZ)
|
||||||
|
|
@ -602,7 +604,7 @@ static int hw_break_set(struct task_struct *target,
|
||||||
break;
|
break;
|
||||||
|
|
||||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &mask,
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &mask,
|
||||||
offset, offset + PTRACE_HBP_ADDR_SZ);
|
offset, offset + PTRACE_HBP_MASK_SZ);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
|
@ -611,8 +613,8 @@ static int hw_break_set(struct task_struct *target,
|
||||||
return ret;
|
return ret;
|
||||||
offset += PTRACE_HBP_MASK_SZ;
|
offset += PTRACE_HBP_MASK_SZ;
|
||||||
|
|
||||||
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &mask,
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
|
||||||
offset, offset + PTRACE_HBP_MASK_SZ);
|
offset, offset + PTRACE_HBP_CTRL_SZ);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
|
@ -620,6 +622,11 @@ static int hw_break_set(struct task_struct *target,
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
offset += PTRACE_HBP_CTRL_SZ;
|
offset += PTRACE_HBP_CTRL_SZ;
|
||||||
|
|
||||||
|
user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
|
||||||
|
offset, offset + PTRACE_HBP_PAD_SZ);
|
||||||
|
offset += PTRACE_HBP_PAD_SZ;
|
||||||
|
|
||||||
idx++;
|
idx++;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -160,6 +160,27 @@ static void __init smbios_parse(void)
|
||||||
dmi_walk(find_tokens, NULL);
|
dmi_walk(find_tokens, NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_WRITECOMBINE
|
||||||
|
pgprot_t pgprot_wc = PAGE_KERNEL_WUC;
|
||||||
|
#else
|
||||||
|
pgprot_t pgprot_wc = PAGE_KERNEL_SUC;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
EXPORT_SYMBOL(pgprot_wc);
|
||||||
|
|
||||||
|
static int __init setup_writecombine(char *p)
|
||||||
|
{
|
||||||
|
if (!strcmp(p, "on"))
|
||||||
|
pgprot_wc = PAGE_KERNEL_WUC;
|
||||||
|
else if (!strcmp(p, "off"))
|
||||||
|
pgprot_wc = PAGE_KERNEL_SUC;
|
||||||
|
else
|
||||||
|
pr_warn("Unknown writecombine setting \"%s\".\n", p);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
early_param("writecombine", setup_writecombine);
|
||||||
|
|
||||||
static int usermem __initdata;
|
static int usermem __initdata;
|
||||||
|
|
||||||
static int __init early_parse_mem(char *p)
|
static int __init early_parse_mem(char *p)
|
||||||
|
|
@ -368,8 +389,8 @@ static void __init arch_mem_init(char **cmdline_p)
|
||||||
/*
|
/*
|
||||||
* In order to reduce the possibility of kernel panic when failed to
|
* In order to reduce the possibility of kernel panic when failed to
|
||||||
* get IO TLB memory under CONFIG_SWIOTLB, it is better to allocate
|
* get IO TLB memory under CONFIG_SWIOTLB, it is better to allocate
|
||||||
* low memory as small as possible before plat_swiotlb_setup(), so
|
* low memory as small as possible before swiotlb_init(), so make
|
||||||
* make sparse_init() using top-down allocation.
|
* sparse_init() using top-down allocation.
|
||||||
*/
|
*/
|
||||||
memblock_set_bottom_up(false);
|
memblock_set_bottom_up(false);
|
||||||
sparse_init();
|
sparse_init();
|
||||||
|
|
|
||||||
|
|
@ -30,7 +30,7 @@ void arch_stack_walk(stack_trace_consume_fn consume_entry, void *cookie,
|
||||||
|
|
||||||
regs->regs[1] = 0;
|
regs->regs[1] = 0;
|
||||||
for (unwind_start(&state, task, regs);
|
for (unwind_start(&state, task, regs);
|
||||||
!unwind_done(&state); unwind_next_frame(&state)) {
|
!unwind_done(&state) && !unwind_error(&state); unwind_next_frame(&state)) {
|
||||||
addr = unwind_get_return_address(&state);
|
addr = unwind_get_return_address(&state);
|
||||||
if (!addr || !consume_entry(cookie, addr))
|
if (!addr || !consume_entry(cookie, addr))
|
||||||
break;
|
break;
|
||||||
|
|
|
||||||
|
|
@ -28,5 +28,6 @@ bool default_next_frame(struct unwind_state *state)
|
||||||
|
|
||||||
} while (!get_stack_info(state->sp, state->task, info));
|
} while (!get_stack_info(state->sp, state->task, info));
|
||||||
|
|
||||||
|
state->error = true;
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -211,7 +211,7 @@ static bool next_frame(struct unwind_state *state)
|
||||||
pc = regs->csr_era;
|
pc = regs->csr_era;
|
||||||
|
|
||||||
if (user_mode(regs) || !__kernel_text_address(pc))
|
if (user_mode(regs) || !__kernel_text_address(pc))
|
||||||
return false;
|
goto out;
|
||||||
|
|
||||||
state->first = true;
|
state->first = true;
|
||||||
state->pc = pc;
|
state->pc = pc;
|
||||||
|
|
@ -226,6 +226,8 @@ static bool next_frame(struct unwind_state *state)
|
||||||
|
|
||||||
} while (!get_stack_info(state->sp, state->task, info));
|
} while (!get_stack_info(state->sp, state->task, info));
|
||||||
|
|
||||||
|
out:
|
||||||
|
state->error = true;
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
* don't have to care about aliases on other CPUs.
|
* don't have to care about aliases on other CPUs.
|
||||||
*/
|
*/
|
||||||
unsigned long empty_zero_page, zero_page_mask;
|
unsigned long empty_zero_page, zero_page_mask;
|
||||||
EXPORT_SYMBOL_GPL(empty_zero_page);
|
EXPORT_SYMBOL(empty_zero_page);
|
||||||
EXPORT_SYMBOL(zero_page_mask);
|
EXPORT_SYMBOL(zero_page_mask);
|
||||||
|
|
||||||
void setup_zero_pages(void)
|
void setup_zero_pages(void)
|
||||||
|
|
@ -270,7 +270,7 @@ pud_t invalid_pud_table[PTRS_PER_PUD] __page_aligned_bss;
|
||||||
#endif
|
#endif
|
||||||
#ifndef __PAGETABLE_PMD_FOLDED
|
#ifndef __PAGETABLE_PMD_FOLDED
|
||||||
pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
|
pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
|
||||||
EXPORT_SYMBOL_GPL(invalid_pmd_table);
|
EXPORT_SYMBOL(invalid_pmd_table);
|
||||||
#endif
|
#endif
|
||||||
pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
|
pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
|
||||||
EXPORT_SYMBOL(invalid_pte_table);
|
EXPORT_SYMBOL(invalid_pte_table);
|
||||||
|
|
|
||||||
|
|
@ -80,6 +80,10 @@ SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)
|
||||||
|
|
||||||
JUMP_VIRT_ADDR t0, t1
|
JUMP_VIRT_ADDR t0, t1
|
||||||
|
|
||||||
|
/* Enable PG */
|
||||||
|
li.w t0, 0xb0 # PLV=0, IE=0, PG=1
|
||||||
|
csrwr t0, LOONGARCH_CSR_CRMD
|
||||||
|
|
||||||
la.pcrel t0, acpi_saved_sp
|
la.pcrel t0, acpi_saved_sp
|
||||||
ld.d sp, t0, 0
|
ld.d sp, t0, 0
|
||||||
SETUP_WAKEUP
|
SETUP_WAKEUP
|
||||||
|
|
|
||||||
|
|
@ -366,6 +366,7 @@ void update_numa_distance(struct device_node *node)
|
||||||
WARN(numa_distance_table[nid][nid] == -1,
|
WARN(numa_distance_table[nid][nid] == -1,
|
||||||
"NUMA distance details for node %d not provided\n", nid);
|
"NUMA distance details for node %d not provided\n", nid);
|
||||||
}
|
}
|
||||||
|
EXPORT_SYMBOL_GPL(update_numa_distance);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* ibm,numa-lookup-index-table= {N, domainid1, domainid2, ..... domainidN}
|
* ibm,numa-lookup-index-table= {N, domainid1, domainid2, ..... domainidN}
|
||||||
|
|
|
||||||
|
|
@ -1428,6 +1428,13 @@ static int papr_scm_probe(struct platform_device *pdev)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* open firmware platform device create won't update the NUMA
|
||||||
|
* distance table. For PAPR SCM devices we use numa_map_to_online_node()
|
||||||
|
* to find the nearest online NUMA node and that requires correct
|
||||||
|
* distance table information.
|
||||||
|
*/
|
||||||
|
update_numa_distance(dn);
|
||||||
|
|
||||||
p = kzalloc(sizeof(*p), GFP_KERNEL);
|
p = kzalloc(sizeof(*p), GFP_KERNEL);
|
||||||
if (!p)
|
if (!p)
|
||||||
|
|
|
||||||
|
|
@ -259,7 +259,6 @@
|
||||||
<&sysclk K210_CLK_APB0>;
|
<&sysclk K210_CLK_APB0>;
|
||||||
clock-names = "ssi_clk", "pclk";
|
clock-names = "ssi_clk", "pclk";
|
||||||
resets = <&sysrst K210_RST_SPI2>;
|
resets = <&sysrst K210_RST_SPI2>;
|
||||||
spi-max-frequency = <25000000>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
i2s0: i2s@50250000 {
|
i2s0: i2s@50250000 {
|
||||||
|
|
|
||||||
|
|
@ -22,6 +22,14 @@
|
||||||
*/
|
*/
|
||||||
enum fixed_addresses {
|
enum fixed_addresses {
|
||||||
FIX_HOLE,
|
FIX_HOLE,
|
||||||
|
/*
|
||||||
|
* The fdt fixmap mapping must be PMD aligned and will be mapped
|
||||||
|
* using PMD entries in fixmap_pmd in 64-bit and a PGD entry in 32-bit.
|
||||||
|
*/
|
||||||
|
FIX_FDT_END,
|
||||||
|
FIX_FDT = FIX_FDT_END + FIX_FDT_SIZE / PAGE_SIZE - 1,
|
||||||
|
|
||||||
|
/* Below fixmaps will be mapped using fixmap_pte */
|
||||||
FIX_PTE,
|
FIX_PTE,
|
||||||
FIX_PMD,
|
FIX_PMD,
|
||||||
FIX_PUD,
|
FIX_PUD,
|
||||||
|
|
|
||||||
|
|
@ -87,9 +87,13 @@
|
||||||
|
|
||||||
#define FIXADDR_TOP PCI_IO_START
|
#define FIXADDR_TOP PCI_IO_START
|
||||||
#ifdef CONFIG_64BIT
|
#ifdef CONFIG_64BIT
|
||||||
#define FIXADDR_SIZE PMD_SIZE
|
#define MAX_FDT_SIZE PMD_SIZE
|
||||||
|
#define FIX_FDT_SIZE (MAX_FDT_SIZE + SZ_2M)
|
||||||
|
#define FIXADDR_SIZE (PMD_SIZE + FIX_FDT_SIZE)
|
||||||
#else
|
#else
|
||||||
#define FIXADDR_SIZE PGDIR_SIZE
|
#define MAX_FDT_SIZE PGDIR_SIZE
|
||||||
|
#define FIX_FDT_SIZE MAX_FDT_SIZE
|
||||||
|
#define FIXADDR_SIZE (PGDIR_SIZE + FIX_FDT_SIZE)
|
||||||
#endif
|
#endif
|
||||||
#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
|
#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -278,12 +278,8 @@ void __init setup_arch(char **cmdline_p)
|
||||||
#if IS_ENABLED(CONFIG_BUILTIN_DTB)
|
#if IS_ENABLED(CONFIG_BUILTIN_DTB)
|
||||||
unflatten_and_copy_device_tree();
|
unflatten_and_copy_device_tree();
|
||||||
#else
|
#else
|
||||||
if (early_init_dt_verify(__va(XIP_FIXUP(dtb_early_pa))))
|
|
||||||
unflatten_device_tree();
|
unflatten_device_tree();
|
||||||
else
|
|
||||||
pr_err("No DTB found in kernel mappings\n");
|
|
||||||
#endif
|
#endif
|
||||||
early_init_fdt_scan_reserved_mem();
|
|
||||||
misc_mem_init();
|
misc_mem_init();
|
||||||
|
|
||||||
init_resources();
|
init_resources();
|
||||||
|
|
|
||||||
|
|
@ -19,6 +19,7 @@
|
||||||
#include <asm/signal32.h>
|
#include <asm/signal32.h>
|
||||||
#include <asm/switch_to.h>
|
#include <asm/switch_to.h>
|
||||||
#include <asm/csr.h>
|
#include <asm/csr.h>
|
||||||
|
#include <asm/cacheflush.h>
|
||||||
|
|
||||||
extern u32 __user_rt_sigreturn[2];
|
extern u32 __user_rt_sigreturn[2];
|
||||||
|
|
||||||
|
|
@ -181,6 +182,7 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
|
||||||
{
|
{
|
||||||
struct rt_sigframe __user *frame;
|
struct rt_sigframe __user *frame;
|
||||||
long err = 0;
|
long err = 0;
|
||||||
|
unsigned long __maybe_unused addr;
|
||||||
|
|
||||||
frame = get_sigframe(ksig, regs, sizeof(*frame));
|
frame = get_sigframe(ksig, regs, sizeof(*frame));
|
||||||
if (!access_ok(frame, sizeof(*frame)))
|
if (!access_ok(frame, sizeof(*frame)))
|
||||||
|
|
@ -209,7 +211,12 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
|
||||||
if (copy_to_user(&frame->sigreturn_code, __user_rt_sigreturn,
|
if (copy_to_user(&frame->sigreturn_code, __user_rt_sigreturn,
|
||||||
sizeof(frame->sigreturn_code)))
|
sizeof(frame->sigreturn_code)))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
regs->ra = (unsigned long)&frame->sigreturn_code;
|
|
||||||
|
addr = (unsigned long)&frame->sigreturn_code;
|
||||||
|
/* Make sure the two instructions are pushed to icache. */
|
||||||
|
flush_icache_range(addr, addr + sizeof(frame->sigreturn_code));
|
||||||
|
|
||||||
|
regs->ra = addr;
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
||||||
|
|
@ -57,7 +57,6 @@ unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
|
||||||
EXPORT_SYMBOL(empty_zero_page);
|
EXPORT_SYMBOL(empty_zero_page);
|
||||||
|
|
||||||
extern char _start[];
|
extern char _start[];
|
||||||
#define DTB_EARLY_BASE_VA PGDIR_SIZE
|
|
||||||
void *_dtb_early_va __initdata;
|
void *_dtb_early_va __initdata;
|
||||||
uintptr_t _dtb_early_pa __initdata;
|
uintptr_t _dtb_early_pa __initdata;
|
||||||
|
|
||||||
|
|
@ -236,31 +235,22 @@ static void __init setup_bootmem(void)
|
||||||
set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
|
set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
|
||||||
|
|
||||||
reserve_initrd_mem();
|
reserve_initrd_mem();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* No allocation should be done before reserving the memory as defined
|
||||||
|
* in the device tree, otherwise the allocation could end up in a
|
||||||
|
* reserved region.
|
||||||
|
*/
|
||||||
|
early_init_fdt_scan_reserved_mem();
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If DTB is built in, no need to reserve its memblock.
|
* If DTB is built in, no need to reserve its memblock.
|
||||||
* Otherwise, do reserve it but avoid using
|
* Otherwise, do reserve it but avoid using
|
||||||
* early_init_fdt_reserve_self() since __pa() does
|
* early_init_fdt_reserve_self() since __pa() does
|
||||||
* not work for DTB pointers that are fixmap addresses
|
* not work for DTB pointers that are fixmap addresses
|
||||||
*/
|
*/
|
||||||
if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) {
|
if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
|
||||||
/*
|
|
||||||
* In case the DTB is not located in a memory region we won't
|
|
||||||
* be able to locate it later on via the linear mapping and
|
|
||||||
* get a segfault when accessing it via __va(dtb_early_pa).
|
|
||||||
* To avoid this situation copy DTB to a memory region.
|
|
||||||
* Note that memblock_phys_alloc will also reserve DTB region.
|
|
||||||
*/
|
|
||||||
if (!memblock_is_memory(dtb_early_pa)) {
|
|
||||||
size_t fdt_size = fdt_totalsize(dtb_early_va);
|
|
||||||
phys_addr_t new_dtb_early_pa = memblock_phys_alloc(fdt_size, PAGE_SIZE);
|
|
||||||
void *new_dtb_early_va = early_memremap(new_dtb_early_pa, fdt_size);
|
|
||||||
|
|
||||||
memcpy(new_dtb_early_va, dtb_early_va, fdt_size);
|
|
||||||
early_memunmap(new_dtb_early_va, fdt_size);
|
|
||||||
_dtb_early_pa = new_dtb_early_pa;
|
|
||||||
} else
|
|
||||||
memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
|
memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
|
||||||
}
|
|
||||||
|
|
||||||
dma_contiguous_reserve(dma32_phys_limit);
|
dma_contiguous_reserve(dma32_phys_limit);
|
||||||
if (IS_ENABLED(CONFIG_64BIT))
|
if (IS_ENABLED(CONFIG_64BIT))
|
||||||
|
|
@ -279,9 +269,6 @@ pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
|
||||||
static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
|
static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
|
||||||
|
|
||||||
pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
|
pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
|
||||||
static p4d_t __maybe_unused early_dtb_p4d[PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
|
|
||||||
static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
|
|
||||||
static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
|
|
||||||
|
|
||||||
#ifdef CONFIG_XIP_KERNEL
|
#ifdef CONFIG_XIP_KERNEL
|
||||||
#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
|
#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
|
||||||
|
|
@ -626,9 +613,6 @@ static void __init create_p4d_mapping(p4d_t *p4dp,
|
||||||
#define trampoline_pgd_next (pgtable_l5_enabled ? \
|
#define trampoline_pgd_next (pgtable_l5_enabled ? \
|
||||||
(uintptr_t)trampoline_p4d : (pgtable_l4_enabled ? \
|
(uintptr_t)trampoline_p4d : (pgtable_l4_enabled ? \
|
||||||
(uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd))
|
(uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd))
|
||||||
#define early_dtb_pgd_next (pgtable_l5_enabled ? \
|
|
||||||
(uintptr_t)early_dtb_p4d : (pgtable_l4_enabled ? \
|
|
||||||
(uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd))
|
|
||||||
#else
|
#else
|
||||||
#define pgd_next_t pte_t
|
#define pgd_next_t pte_t
|
||||||
#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
|
#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
|
||||||
|
|
@ -636,7 +620,6 @@ static void __init create_p4d_mapping(p4d_t *p4dp,
|
||||||
#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
|
#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
|
||||||
create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
|
create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
|
||||||
#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
|
#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
|
||||||
#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
|
|
||||||
#define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
#define create_p4d_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
||||||
#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
||||||
#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot) do {} while(0)
|
||||||
|
|
@ -860,32 +843,28 @@ static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
|
||||||
* this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
|
* this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
|
||||||
* entry.
|
* entry.
|
||||||
*/
|
*/
|
||||||
static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
|
static void __init create_fdt_early_page_table(pgd_t *pgdir,
|
||||||
|
uintptr_t fix_fdt_va,
|
||||||
|
uintptr_t dtb_pa)
|
||||||
{
|
{
|
||||||
#ifndef CONFIG_BUILTIN_DTB
|
|
||||||
uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
|
uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
|
||||||
|
|
||||||
create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
|
#ifndef CONFIG_BUILTIN_DTB
|
||||||
IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
|
/* Make sure the fdt fixmap address is always aligned on PMD size */
|
||||||
PGDIR_SIZE,
|
BUILD_BUG_ON(FIX_FDT % (PMD_SIZE / PAGE_SIZE));
|
||||||
IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
|
|
||||||
|
|
||||||
if (pgtable_l5_enabled)
|
/* In 32-bit only, the fdt lies in its own PGD */
|
||||||
create_p4d_mapping(early_dtb_p4d, DTB_EARLY_BASE_VA,
|
if (!IS_ENABLED(CONFIG_64BIT)) {
|
||||||
(uintptr_t)early_dtb_pud, P4D_SIZE, PAGE_TABLE);
|
create_pgd_mapping(early_pg_dir, fix_fdt_va,
|
||||||
|
pa, MAX_FDT_SIZE, PAGE_KERNEL);
|
||||||
if (pgtable_l4_enabled)
|
} else {
|
||||||
create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
|
create_pmd_mapping(fixmap_pmd, fix_fdt_va,
|
||||||
(uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
|
|
||||||
|
|
||||||
if (IS_ENABLED(CONFIG_64BIT)) {
|
|
||||||
create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
|
|
||||||
pa, PMD_SIZE, PAGE_KERNEL);
|
pa, PMD_SIZE, PAGE_KERNEL);
|
||||||
create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
|
create_pmd_mapping(fixmap_pmd, fix_fdt_va + PMD_SIZE,
|
||||||
pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
|
pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
|
||||||
}
|
}
|
||||||
|
|
||||||
dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
|
dtb_early_va = (void *)fix_fdt_va + (dtb_pa & (PMD_SIZE - 1));
|
||||||
#else
|
#else
|
||||||
/*
|
/*
|
||||||
* For 64-bit kernel, __va can't be used since it would return a linear
|
* For 64-bit kernel, __va can't be used since it would return a linear
|
||||||
|
|
@ -1055,7 +1034,8 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
|
||||||
create_kernel_page_table(early_pg_dir, true);
|
create_kernel_page_table(early_pg_dir, true);
|
||||||
|
|
||||||
/* Setup early mapping for FDT early scan */
|
/* Setup early mapping for FDT early scan */
|
||||||
create_fdt_early_page_table(early_pg_dir, dtb_pa);
|
create_fdt_early_page_table(early_pg_dir,
|
||||||
|
__fix_to_virt(FIX_FDT), dtb_pa);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
|
* Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
|
||||||
|
|
@ -1097,6 +1077,16 @@ static void __init setup_vm_final(void)
|
||||||
u64 i;
|
u64 i;
|
||||||
|
|
||||||
/* Setup swapper PGD for fixmap */
|
/* Setup swapper PGD for fixmap */
|
||||||
|
#if !defined(CONFIG_64BIT)
|
||||||
|
/*
|
||||||
|
* In 32-bit, the device tree lies in a pgd entry, so it must be copied
|
||||||
|
* directly in swapper_pg_dir in addition to the pgd entry that points
|
||||||
|
* to fixmap_pte.
|
||||||
|
*/
|
||||||
|
unsigned long idx = pgd_index(__fix_to_virt(FIX_FDT));
|
||||||
|
|
||||||
|
set_pgd(&swapper_pg_dir[idx], early_pg_dir[idx]);
|
||||||
|
#endif
|
||||||
create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
|
create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
|
||||||
__pa_symbol(fixmap_pgd_next),
|
__pa_symbol(fixmap_pgd_next),
|
||||||
PGDIR_SIZE, PAGE_TABLE);
|
PGDIR_SIZE, PAGE_TABLE);
|
||||||
|
|
|
||||||
|
|
@ -84,12 +84,7 @@ CFLAGS_string.o += $(PURGATORY_CFLAGS)
|
||||||
CFLAGS_REMOVE_ctype.o += $(PURGATORY_CFLAGS_REMOVE)
|
CFLAGS_REMOVE_ctype.o += $(PURGATORY_CFLAGS_REMOVE)
|
||||||
CFLAGS_ctype.o += $(PURGATORY_CFLAGS)
|
CFLAGS_ctype.o += $(PURGATORY_CFLAGS)
|
||||||
|
|
||||||
AFLAGS_REMOVE_entry.o += -Wa,-gdwarf-2
|
asflags-remove-y += $(foreach x, -g -gdwarf-4 -gdwarf-5, $(x) -Wa,$(x))
|
||||||
AFLAGS_REMOVE_memcpy.o += -Wa,-gdwarf-2
|
|
||||||
AFLAGS_REMOVE_memset.o += -Wa,-gdwarf-2
|
|
||||||
AFLAGS_REMOVE_strcmp.o += -Wa,-gdwarf-2
|
|
||||||
AFLAGS_REMOVE_strlen.o += -Wa,-gdwarf-2
|
|
||||||
AFLAGS_REMOVE_strncmp.o += -Wa,-gdwarf-2
|
|
||||||
|
|
||||||
$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
|
$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
|
||||||
$(call if_changed,ld)
|
$(call if_changed,ld)
|
||||||
|
|
|
||||||
|
|
@ -539,7 +539,7 @@ static void bpf_jit_plt(void *plt, void *ret, void *target)
|
||||||
{
|
{
|
||||||
memcpy(plt, bpf_plt, BPF_PLT_SIZE);
|
memcpy(plt, bpf_plt, BPF_PLT_SIZE);
|
||||||
*(void **)((char *)plt + (bpf_plt_ret - bpf_plt)) = ret;
|
*(void **)((char *)plt + (bpf_plt_ret - bpf_plt)) = ret;
|
||||||
*(void **)((char *)plt + (bpf_plt_target - bpf_plt)) = target;
|
*(void **)((char *)plt + (bpf_plt_target - bpf_plt)) = target ?: ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
@ -2010,7 +2010,9 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t,
|
||||||
} __packed insn;
|
} __packed insn;
|
||||||
char expected_plt[BPF_PLT_SIZE];
|
char expected_plt[BPF_PLT_SIZE];
|
||||||
char current_plt[BPF_PLT_SIZE];
|
char current_plt[BPF_PLT_SIZE];
|
||||||
|
char new_plt[BPF_PLT_SIZE];
|
||||||
char *plt;
|
char *plt;
|
||||||
|
char *ret;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
/* Verify the branch to be patched. */
|
/* Verify the branch to be patched. */
|
||||||
|
|
@ -2032,12 +2034,15 @@ int bpf_arch_text_poke(void *ip, enum bpf_text_poke_type t,
|
||||||
err = copy_from_kernel_nofault(current_plt, plt, BPF_PLT_SIZE);
|
err = copy_from_kernel_nofault(current_plt, plt, BPF_PLT_SIZE);
|
||||||
if (err < 0)
|
if (err < 0)
|
||||||
return err;
|
return err;
|
||||||
bpf_jit_plt(expected_plt, (char *)ip + 6, old_addr);
|
ret = (char *)ip + 6;
|
||||||
|
bpf_jit_plt(expected_plt, ret, old_addr);
|
||||||
if (memcmp(current_plt, expected_plt, BPF_PLT_SIZE))
|
if (memcmp(current_plt, expected_plt, BPF_PLT_SIZE))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
/* Adjust the call address. */
|
/* Adjust the call address. */
|
||||||
|
bpf_jit_plt(new_plt, ret, new_addr);
|
||||||
s390_kernel_write(plt + (bpf_plt_target - bpf_plt),
|
s390_kernel_write(plt + (bpf_plt_target - bpf_plt),
|
||||||
&new_addr, sizeof(void *));
|
new_plt + (bpf_plt_target - bpf_plt),
|
||||||
|
sizeof(void *));
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Adjust the mask of the branch. */
|
/* Adjust the mask of the branch. */
|
||||||
|
|
|
||||||
|
|
@ -33,8 +33,8 @@ static int __init iommu_init_noop(void) { return 0; }
|
||||||
static void iommu_shutdown_noop(void) { }
|
static void iommu_shutdown_noop(void) { }
|
||||||
bool __init bool_x86_init_noop(void) { return false; }
|
bool __init bool_x86_init_noop(void) { return false; }
|
||||||
void x86_op_int_noop(int cpu) { }
|
void x86_op_int_noop(int cpu) { }
|
||||||
static __init int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
|
static int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
|
||||||
static __init void get_rtc_noop(struct timespec64 *now) { }
|
static void get_rtc_noop(struct timespec64 *now) { }
|
||||||
|
|
||||||
static __initconst const struct of_device_id of_cmos_match[] = {
|
static __initconst const struct of_device_id of_cmos_match[] = {
|
||||||
{ .compatible = "motorola,mc146818" },
|
{ .compatible = "motorola,mc146818" },
|
||||||
|
|
|
||||||
|
|
@ -69,8 +69,7 @@ CFLAGS_sha256.o += $(PURGATORY_CFLAGS)
|
||||||
CFLAGS_REMOVE_string.o += $(PURGATORY_CFLAGS_REMOVE)
|
CFLAGS_REMOVE_string.o += $(PURGATORY_CFLAGS_REMOVE)
|
||||||
CFLAGS_string.o += $(PURGATORY_CFLAGS)
|
CFLAGS_string.o += $(PURGATORY_CFLAGS)
|
||||||
|
|
||||||
AFLAGS_REMOVE_setup-x86_$(BITS).o += -Wa,-gdwarf-2
|
asflags-remove-y += $(foreach x, -g -gdwarf-4 -gdwarf-5, $(x) -Wa,$(x))
|
||||||
AFLAGS_REMOVE_entry64.o += -Wa,-gdwarf-2
|
|
||||||
|
|
||||||
$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
|
$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
|
||||||
$(call if_changed,ld)
|
$(call if_changed,ld)
|
||||||
|
|
|
||||||
|
|
@ -439,6 +439,13 @@ static const struct dmi_system_id asus_laptop[] = {
|
||||||
DMI_MATCH(DMI_BOARD_NAME, "S5602ZA"),
|
DMI_MATCH(DMI_BOARD_NAME, "S5602ZA"),
|
||||||
},
|
},
|
||||||
},
|
},
|
||||||
|
{
|
||||||
|
.ident = "Asus ExpertBook B1502CBA",
|
||||||
|
.matches = {
|
||||||
|
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
|
||||||
|
DMI_MATCH(DMI_BOARD_NAME, "B1502CBA"),
|
||||||
|
},
|
||||||
|
},
|
||||||
{
|
{
|
||||||
.ident = "Asus ExpertBook B2402CBA",
|
.ident = "Asus ExpertBook B2402CBA",
|
||||||
.matches = {
|
.matches = {
|
||||||
|
|
|
||||||
|
|
@ -213,6 +213,7 @@ bool acpi_device_override_status(struct acpi_device *adev, unsigned long long *s
|
||||||
disk in the system.
|
disk in the system.
|
||||||
*/
|
*/
|
||||||
static const struct x86_cpu_id storage_d3_cpu_ids[] = {
|
static const struct x86_cpu_id storage_d3_cpu_ids[] = {
|
||||||
|
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 24, NULL), /* Picasso */
|
||||||
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */
|
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL), /* Renoir */
|
||||||
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */
|
X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL), /* Lucienne */
|
||||||
X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */
|
X86_MATCH_VENDOR_FAM_MODEL(AMD, 25, 80, NULL), /* Cezanne */
|
||||||
|
|
|
||||||
|
|
@ -143,8 +143,9 @@ static int rs9_regmap_i2c_read(void *context,
|
||||||
static const struct regmap_config rs9_regmap_config = {
|
static const struct regmap_config rs9_regmap_config = {
|
||||||
.reg_bits = 8,
|
.reg_bits = 8,
|
||||||
.val_bits = 8,
|
.val_bits = 8,
|
||||||
.cache_type = REGCACHE_NONE,
|
.cache_type = REGCACHE_FLAT,
|
||||||
.max_register = RS9_REG_BCP,
|
.max_register = RS9_REG_BCP,
|
||||||
|
.num_reg_defaults_raw = 0x8,
|
||||||
.rd_table = &rs9_readable_table,
|
.rd_table = &rs9_readable_table,
|
||||||
.wr_table = &rs9_writeable_table,
|
.wr_table = &rs9_writeable_table,
|
||||||
.reg_write = rs9_regmap_i2c_write,
|
.reg_write = rs9_regmap_i2c_write,
|
||||||
|
|
|
||||||
|
|
@ -95,14 +95,16 @@ static const struct clk_div_table video_div_table[] = {
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
|
|
||||||
static const char * enet1_ref_sels[] = { "enet1_ref_125m", "enet1_ref_pad", };
|
static const char * enet1_ref_sels[] = { "enet1_ref_125m", "enet1_ref_pad", "dummy", "dummy"};
|
||||||
static const u32 enet1_ref_sels_table[] = { IMX6UL_GPR1_ENET1_TX_CLK_DIR,
|
static const u32 enet1_ref_sels_table[] = { IMX6UL_GPR1_ENET1_TX_CLK_DIR,
|
||||||
IMX6UL_GPR1_ENET1_CLK_SEL };
|
IMX6UL_GPR1_ENET1_CLK_SEL, 0,
|
||||||
|
IMX6UL_GPR1_ENET1_TX_CLK_DIR | IMX6UL_GPR1_ENET1_CLK_SEL };
|
||||||
static const u32 enet1_ref_sels_table_mask = IMX6UL_GPR1_ENET1_TX_CLK_DIR |
|
static const u32 enet1_ref_sels_table_mask = IMX6UL_GPR1_ENET1_TX_CLK_DIR |
|
||||||
IMX6UL_GPR1_ENET1_CLK_SEL;
|
IMX6UL_GPR1_ENET1_CLK_SEL;
|
||||||
static const char * enet2_ref_sels[] = { "enet2_ref_125m", "enet2_ref_pad", };
|
static const char * enet2_ref_sels[] = { "enet2_ref_125m", "enet2_ref_pad", "dummy", "dummy"};
|
||||||
static const u32 enet2_ref_sels_table[] = { IMX6UL_GPR1_ENET2_TX_CLK_DIR,
|
static const u32 enet2_ref_sels_table[] = { IMX6UL_GPR1_ENET2_TX_CLK_DIR,
|
||||||
IMX6UL_GPR1_ENET2_CLK_SEL };
|
IMX6UL_GPR1_ENET2_CLK_SEL, 0,
|
||||||
|
IMX6UL_GPR1_ENET2_TX_CLK_DIR | IMX6UL_GPR1_ENET2_CLK_SEL };
|
||||||
static const u32 enet2_ref_sels_table_mask = IMX6UL_GPR1_ENET2_TX_CLK_DIR |
|
static const u32 enet2_ref_sels_table_mask = IMX6UL_GPR1_ENET2_TX_CLK_DIR |
|
||||||
IMX6UL_GPR1_ENET2_CLK_SEL;
|
IMX6UL_GPR1_ENET2_CLK_SEL;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -17,7 +17,6 @@ static const struct regmap_config sprdclk_regmap_config = {
|
||||||
.reg_bits = 32,
|
.reg_bits = 32,
|
||||||
.reg_stride = 4,
|
.reg_stride = 4,
|
||||||
.val_bits = 32,
|
.val_bits = 32,
|
||||||
.max_register = 0xffff,
|
|
||||||
.fast_io = true,
|
.fast_io = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -43,6 +42,8 @@ int sprd_clk_regmap_init(struct platform_device *pdev,
|
||||||
struct device *dev = &pdev->dev;
|
struct device *dev = &pdev->dev;
|
||||||
struct device_node *node = dev->of_node, *np;
|
struct device_node *node = dev->of_node, *np;
|
||||||
struct regmap *regmap;
|
struct regmap *regmap;
|
||||||
|
struct resource *res;
|
||||||
|
struct regmap_config reg_config = sprdclk_regmap_config;
|
||||||
|
|
||||||
if (of_find_property(node, "sprd,syscon", NULL)) {
|
if (of_find_property(node, "sprd,syscon", NULL)) {
|
||||||
regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
|
regmap = syscon_regmap_lookup_by_phandle(node, "sprd,syscon");
|
||||||
|
|
@ -59,12 +60,14 @@ int sprd_clk_regmap_init(struct platform_device *pdev,
|
||||||
return PTR_ERR(regmap);
|
return PTR_ERR(regmap);
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
base = devm_platform_ioremap_resource(pdev, 0);
|
base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
|
||||||
if (IS_ERR(base))
|
if (IS_ERR(base))
|
||||||
return PTR_ERR(base);
|
return PTR_ERR(base);
|
||||||
|
|
||||||
|
reg_config.max_register = resource_size(res) - reg_config.reg_stride;
|
||||||
|
|
||||||
regmap = devm_regmap_init_mmio(&pdev->dev, base,
|
regmap = devm_regmap_init_mmio(&pdev->dev, base,
|
||||||
&sprdclk_regmap_config);
|
®_config);
|
||||||
if (IS_ERR(regmap)) {
|
if (IS_ERR(regmap)) {
|
||||||
pr_err("failed to init regmap\n");
|
pr_err("failed to init regmap\n");
|
||||||
return PTR_ERR(regmap);
|
return PTR_ERR(regmap);
|
||||||
|
|
|
||||||
|
|
@ -840,22 +840,20 @@ static int amd_pstate_update_status(const char *buf, size_t size)
|
||||||
|
|
||||||
switch(mode_idx) {
|
switch(mode_idx) {
|
||||||
case AMD_PSTATE_DISABLE:
|
case AMD_PSTATE_DISABLE:
|
||||||
if (!current_pstate_driver)
|
if (current_pstate_driver) {
|
||||||
return -EINVAL;
|
|
||||||
if (cppc_state == AMD_PSTATE_ACTIVE)
|
|
||||||
return -EBUSY;
|
|
||||||
cpufreq_unregister_driver(current_pstate_driver);
|
cpufreq_unregister_driver(current_pstate_driver);
|
||||||
amd_pstate_driver_cleanup();
|
amd_pstate_driver_cleanup();
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
case AMD_PSTATE_PASSIVE:
|
case AMD_PSTATE_PASSIVE:
|
||||||
if (current_pstate_driver) {
|
if (current_pstate_driver) {
|
||||||
if (current_pstate_driver == &amd_pstate_driver)
|
if (current_pstate_driver == &amd_pstate_driver)
|
||||||
return 0;
|
return 0;
|
||||||
cpufreq_unregister_driver(current_pstate_driver);
|
cpufreq_unregister_driver(current_pstate_driver);
|
||||||
cppc_state = AMD_PSTATE_PASSIVE;
|
|
||||||
current_pstate_driver = &amd_pstate_driver;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
current_pstate_driver = &amd_pstate_driver;
|
||||||
|
cppc_state = AMD_PSTATE_PASSIVE;
|
||||||
ret = cpufreq_register_driver(current_pstate_driver);
|
ret = cpufreq_register_driver(current_pstate_driver);
|
||||||
break;
|
break;
|
||||||
case AMD_PSTATE_ACTIVE:
|
case AMD_PSTATE_ACTIVE:
|
||||||
|
|
@ -863,10 +861,10 @@ static int amd_pstate_update_status(const char *buf, size_t size)
|
||||||
if (current_pstate_driver == &amd_pstate_epp_driver)
|
if (current_pstate_driver == &amd_pstate_epp_driver)
|
||||||
return 0;
|
return 0;
|
||||||
cpufreq_unregister_driver(current_pstate_driver);
|
cpufreq_unregister_driver(current_pstate_driver);
|
||||||
current_pstate_driver = &amd_pstate_epp_driver;
|
|
||||||
cppc_state = AMD_PSTATE_ACTIVE;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
current_pstate_driver = &amd_pstate_epp_driver;
|
||||||
|
cppc_state = AMD_PSTATE_ACTIVE;
|
||||||
ret = cpufreq_register_driver(current_pstate_driver);
|
ret = cpufreq_register_driver(current_pstate_driver);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
|
||||||
|
|
@ -167,7 +167,8 @@ int psci_set_osi_mode(bool enable)
|
||||||
|
|
||||||
err = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, suspend_mode, 0, 0);
|
err = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, suspend_mode, 0, 0);
|
||||||
if (err < 0)
|
if (err < 0)
|
||||||
pr_warn("failed to set %s mode: %d\n", enable ? "OSI" : "PC", err);
|
pr_info(FW_BUG "failed to set %s mode: %d\n",
|
||||||
|
enable ? "OSI" : "PC", err);
|
||||||
return psci_to_linux_errno(err);
|
return psci_to_linux_errno(err);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -48,9 +48,9 @@
|
||||||
* SR_HOLD_TIME_XK_TICKS field will indicate the number of ticks of the
|
* SR_HOLD_TIME_XK_TICKS field will indicate the number of ticks of the
|
||||||
* baud clock required to program 'Hold Time' at X KHz.
|
* baud clock required to program 'Hold Time' at X KHz.
|
||||||
*/
|
*/
|
||||||
#define SR_HOLD_TIME_100K_TICKS 133
|
#define SR_HOLD_TIME_100K_TICKS 150
|
||||||
#define SR_HOLD_TIME_400K_TICKS 20
|
#define SR_HOLD_TIME_400K_TICKS 20
|
||||||
#define SR_HOLD_TIME_1000K_TICKS 11
|
#define SR_HOLD_TIME_1000K_TICKS 12
|
||||||
|
|
||||||
#define SMB_CORE_COMPLETION_REG_OFF3 (SMBUS_MAST_CORE_ADDR_BASE + 0x23)
|
#define SMB_CORE_COMPLETION_REG_OFF3 (SMBUS_MAST_CORE_ADDR_BASE + 0x23)
|
||||||
|
|
||||||
|
|
@ -65,17 +65,17 @@
|
||||||
* the baud clock required to program 'fair idle delay' at X KHz. Fair idle
|
* the baud clock required to program 'fair idle delay' at X KHz. Fair idle
|
||||||
* delay establishes the MCTP T(IDLE_DELAY) period.
|
* delay establishes the MCTP T(IDLE_DELAY) period.
|
||||||
*/
|
*/
|
||||||
#define FAIR_BUS_IDLE_MIN_100K_TICKS 969
|
#define FAIR_BUS_IDLE_MIN_100K_TICKS 992
|
||||||
#define FAIR_BUS_IDLE_MIN_400K_TICKS 157
|
#define FAIR_BUS_IDLE_MIN_400K_TICKS 500
|
||||||
#define FAIR_BUS_IDLE_MIN_1000K_TICKS 157
|
#define FAIR_BUS_IDLE_MIN_1000K_TICKS 500
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* FAIR_IDLE_DELAY_XK_TICKS field will indicate the number of ticks of the
|
* FAIR_IDLE_DELAY_XK_TICKS field will indicate the number of ticks of the
|
||||||
* baud clock required to satisfy the fairness protocol at X KHz.
|
* baud clock required to satisfy the fairness protocol at X KHz.
|
||||||
*/
|
*/
|
||||||
#define FAIR_IDLE_DELAY_100K_TICKS 1000
|
#define FAIR_IDLE_DELAY_100K_TICKS 963
|
||||||
#define FAIR_IDLE_DELAY_400K_TICKS 500
|
#define FAIR_IDLE_DELAY_400K_TICKS 156
|
||||||
#define FAIR_IDLE_DELAY_1000K_TICKS 500
|
#define FAIR_IDLE_DELAY_1000K_TICKS 156
|
||||||
|
|
||||||
#define SMB_IDLE_SCALING_100K \
|
#define SMB_IDLE_SCALING_100K \
|
||||||
((FAIR_IDLE_DELAY_100K_TICKS << 16) | FAIR_BUS_IDLE_MIN_100K_TICKS)
|
((FAIR_IDLE_DELAY_100K_TICKS << 16) | FAIR_BUS_IDLE_MIN_100K_TICKS)
|
||||||
|
|
@ -142,16 +142,16 @@
|
||||||
* determines the SCLK hold time following SDAT driven low during the first
|
* determines the SCLK hold time following SDAT driven low during the first
|
||||||
* START bit in a transfer.
|
* START bit in a transfer.
|
||||||
*/
|
*/
|
||||||
#define FIRST_START_HOLD_100K_TICKS 22
|
#define FIRST_START_HOLD_100K_TICKS 23
|
||||||
#define FIRST_START_HOLD_400K_TICKS 16
|
#define FIRST_START_HOLD_400K_TICKS 8
|
||||||
#define FIRST_START_HOLD_1000K_TICKS 6
|
#define FIRST_START_HOLD_1000K_TICKS 12
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* STOP_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
|
* STOP_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
|
||||||
* required to program 'STOP_SETUP' timer at X KHz. This timer determines the
|
* required to program 'STOP_SETUP' timer at X KHz. This timer determines the
|
||||||
* SDAT setup time from the rising edge of SCLK for a STOP condition.
|
* SDAT setup time from the rising edge of SCLK for a STOP condition.
|
||||||
*/
|
*/
|
||||||
#define STOP_SETUP_100K_TICKS 157
|
#define STOP_SETUP_100K_TICKS 150
|
||||||
#define STOP_SETUP_400K_TICKS 20
|
#define STOP_SETUP_400K_TICKS 20
|
||||||
#define STOP_SETUP_1000K_TICKS 12
|
#define STOP_SETUP_1000K_TICKS 12
|
||||||
|
|
||||||
|
|
@ -160,7 +160,7 @@
|
||||||
* required to program 'RESTART_SETUP' timer at X KHz. This timer determines the
|
* required to program 'RESTART_SETUP' timer at X KHz. This timer determines the
|
||||||
* SDAT setup time from the rising edge of SCLK for a repeated START condition.
|
* SDAT setup time from the rising edge of SCLK for a repeated START condition.
|
||||||
*/
|
*/
|
||||||
#define RESTART_SETUP_100K_TICKS 157
|
#define RESTART_SETUP_100K_TICKS 156
|
||||||
#define RESTART_SETUP_400K_TICKS 20
|
#define RESTART_SETUP_400K_TICKS 20
|
||||||
#define RESTART_SETUP_1000K_TICKS 12
|
#define RESTART_SETUP_1000K_TICKS 12
|
||||||
|
|
||||||
|
|
@ -169,7 +169,7 @@
|
||||||
* required to program 'DATA_HOLD' timer at X KHz. This timer determines the
|
* required to program 'DATA_HOLD' timer at X KHz. This timer determines the
|
||||||
* SDAT hold time following SCLK driven low.
|
* SDAT hold time following SCLK driven low.
|
||||||
*/
|
*/
|
||||||
#define DATA_HOLD_100K_TICKS 2
|
#define DATA_HOLD_100K_TICKS 12
|
||||||
#define DATA_HOLD_400K_TICKS 2
|
#define DATA_HOLD_400K_TICKS 2
|
||||||
#define DATA_HOLD_1000K_TICKS 2
|
#define DATA_HOLD_1000K_TICKS 2
|
||||||
|
|
||||||
|
|
@ -190,35 +190,35 @@
|
||||||
* Bus Idle Minimum time = BUS_IDLE_MIN[7:0] x Baud_Clock_Period x
|
* Bus Idle Minimum time = BUS_IDLE_MIN[7:0] x Baud_Clock_Period x
|
||||||
* (BUS_IDLE_MIN_XK_TICKS[7] ? 4,1)
|
* (BUS_IDLE_MIN_XK_TICKS[7] ? 4,1)
|
||||||
*/
|
*/
|
||||||
#define BUS_IDLE_MIN_100K_TICKS 167UL
|
#define BUS_IDLE_MIN_100K_TICKS 36UL
|
||||||
#define BUS_IDLE_MIN_400K_TICKS 139UL
|
#define BUS_IDLE_MIN_400K_TICKS 10UL
|
||||||
#define BUS_IDLE_MIN_1000K_TICKS 133UL
|
#define BUS_IDLE_MIN_1000K_TICKS 4UL
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CTRL_CUM_TIME_OUT_XK_TICKS defines SMBus Controller Cumulative Time-Out.
|
* CTRL_CUM_TIME_OUT_XK_TICKS defines SMBus Controller Cumulative Time-Out.
|
||||||
* SMBus Controller Cumulative Time-Out duration =
|
* SMBus Controller Cumulative Time-Out duration =
|
||||||
* CTRL_CUM_TIME_OUT_XK_TICKS[7:0] x Baud_Clock_Period x 2048
|
* CTRL_CUM_TIME_OUT_XK_TICKS[7:0] x Baud_Clock_Period x 2048
|
||||||
*/
|
*/
|
||||||
#define CTRL_CUM_TIME_OUT_100K_TICKS 159
|
#define CTRL_CUM_TIME_OUT_100K_TICKS 76
|
||||||
#define CTRL_CUM_TIME_OUT_400K_TICKS 159
|
#define CTRL_CUM_TIME_OUT_400K_TICKS 76
|
||||||
#define CTRL_CUM_TIME_OUT_1000K_TICKS 159
|
#define CTRL_CUM_TIME_OUT_1000K_TICKS 76
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* TARGET_CUM_TIME_OUT_XK_TICKS defines SMBus Target Cumulative Time-Out duration.
|
* TARGET_CUM_TIME_OUT_XK_TICKS defines SMBus Target Cumulative Time-Out duration.
|
||||||
* SMBus Target Cumulative Time-Out duration = TARGET_CUM_TIME_OUT_XK_TICKS[7:0] x
|
* SMBus Target Cumulative Time-Out duration = TARGET_CUM_TIME_OUT_XK_TICKS[7:0] x
|
||||||
* Baud_Clock_Period x 4096
|
* Baud_Clock_Period x 4096
|
||||||
*/
|
*/
|
||||||
#define TARGET_CUM_TIME_OUT_100K_TICKS 199
|
#define TARGET_CUM_TIME_OUT_100K_TICKS 95
|
||||||
#define TARGET_CUM_TIME_OUT_400K_TICKS 199
|
#define TARGET_CUM_TIME_OUT_400K_TICKS 95
|
||||||
#define TARGET_CUM_TIME_OUT_1000K_TICKS 199
|
#define TARGET_CUM_TIME_OUT_1000K_TICKS 95
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CLOCK_HIGH_TIME_OUT_XK defines Clock High time out period.
|
* CLOCK_HIGH_TIME_OUT_XK defines Clock High time out period.
|
||||||
* Clock High time out period = CLOCK_HIGH_TIME_OUT_XK[7:0] x Baud_Clock_Period x 8
|
* Clock High time out period = CLOCK_HIGH_TIME_OUT_XK[7:0] x Baud_Clock_Period x 8
|
||||||
*/
|
*/
|
||||||
#define CLOCK_HIGH_TIME_OUT_100K_TICKS 204
|
#define CLOCK_HIGH_TIME_OUT_100K_TICKS 97
|
||||||
#define CLOCK_HIGH_TIME_OUT_400K_TICKS 204
|
#define CLOCK_HIGH_TIME_OUT_400K_TICKS 97
|
||||||
#define CLOCK_HIGH_TIME_OUT_1000K_TICKS 204
|
#define CLOCK_HIGH_TIME_OUT_1000K_TICKS 97
|
||||||
|
|
||||||
#define TO_SCALING_100K \
|
#define TO_SCALING_100K \
|
||||||
((BUS_IDLE_MIN_100K_TICKS << 24) | (CTRL_CUM_TIME_OUT_100K_TICKS << 16) | \
|
((BUS_IDLE_MIN_100K_TICKS << 24) | (CTRL_CUM_TIME_OUT_100K_TICKS << 16) | \
|
||||||
|
|
|
||||||
|
|
@ -342,18 +342,18 @@ static int ocores_poll_wait(struct ocores_i2c *i2c)
|
||||||
* ocores_isr(), we just add our polling code around it.
|
* ocores_isr(), we just add our polling code around it.
|
||||||
*
|
*
|
||||||
* It can run in atomic context
|
* It can run in atomic context
|
||||||
|
*
|
||||||
|
* Return: 0 on success, -ETIMEDOUT on timeout
|
||||||
*/
|
*/
|
||||||
static void ocores_process_polling(struct ocores_i2c *i2c)
|
static int ocores_process_polling(struct ocores_i2c *i2c)
|
||||||
{
|
{
|
||||||
while (1) {
|
|
||||||
irqreturn_t ret;
|
irqreturn_t ret;
|
||||||
int err;
|
int err = 0;
|
||||||
|
|
||||||
|
while (1) {
|
||||||
err = ocores_poll_wait(i2c);
|
err = ocores_poll_wait(i2c);
|
||||||
if (err) {
|
if (err)
|
||||||
i2c->state = STATE_ERROR;
|
|
||||||
break; /* timeout */
|
break; /* timeout */
|
||||||
}
|
|
||||||
|
|
||||||
ret = ocores_isr(-1, i2c);
|
ret = ocores_isr(-1, i2c);
|
||||||
if (ret == IRQ_NONE)
|
if (ret == IRQ_NONE)
|
||||||
|
|
@ -364,13 +364,15 @@ static void ocores_process_polling(struct ocores_i2c *i2c)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int ocores_xfer_core(struct ocores_i2c *i2c,
|
static int ocores_xfer_core(struct ocores_i2c *i2c,
|
||||||
struct i2c_msg *msgs, int num,
|
struct i2c_msg *msgs, int num,
|
||||||
bool polling)
|
bool polling)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret = 0;
|
||||||
u8 ctrl;
|
u8 ctrl;
|
||||||
|
|
||||||
ctrl = oc_getreg(i2c, OCI2C_CONTROL);
|
ctrl = oc_getreg(i2c, OCI2C_CONTROL);
|
||||||
|
|
@ -388,15 +390,16 @@ static int ocores_xfer_core(struct ocores_i2c *i2c,
|
||||||
oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
|
oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
|
||||||
|
|
||||||
if (polling) {
|
if (polling) {
|
||||||
ocores_process_polling(i2c);
|
ret = ocores_process_polling(i2c);
|
||||||
} else {
|
} else {
|
||||||
ret = wait_event_timeout(i2c->wait,
|
if (wait_event_timeout(i2c->wait,
|
||||||
(i2c->state == STATE_ERROR) ||
|
(i2c->state == STATE_ERROR) ||
|
||||||
(i2c->state == STATE_DONE), HZ);
|
(i2c->state == STATE_DONE), HZ) == 0)
|
||||||
if (ret == 0) {
|
ret = -ETIMEDOUT;
|
||||||
ocores_process_timeout(i2c);
|
|
||||||
return -ETIMEDOUT;
|
|
||||||
}
|
}
|
||||||
|
if (ret) {
|
||||||
|
ocores_process_timeout(i2c);
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
return (i2c->state == STATE_DONE) ? num : -EIO;
|
return (i2c->state == STATE_DONE) ? num : -EIO;
|
||||||
|
|
|
||||||
|
|
@ -624,22 +624,11 @@ static inline unsigned short cma_family(struct rdma_id_private *id_priv)
|
||||||
return id_priv->id.route.addr.src_addr.ss_family;
|
return id_priv->id.route.addr.src_addr.ss_family;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int cma_set_qkey(struct rdma_id_private *id_priv, u32 qkey)
|
static int cma_set_default_qkey(struct rdma_id_private *id_priv)
|
||||||
{
|
{
|
||||||
struct ib_sa_mcmember_rec rec;
|
struct ib_sa_mcmember_rec rec;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
if (id_priv->qkey) {
|
|
||||||
if (qkey && id_priv->qkey != qkey)
|
|
||||||
return -EINVAL;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (qkey) {
|
|
||||||
id_priv->qkey = qkey;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
switch (id_priv->id.ps) {
|
switch (id_priv->id.ps) {
|
||||||
case RDMA_PS_UDP:
|
case RDMA_PS_UDP:
|
||||||
case RDMA_PS_IB:
|
case RDMA_PS_IB:
|
||||||
|
|
@ -659,6 +648,16 @@ static int cma_set_qkey(struct rdma_id_private *id_priv, u32 qkey)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int cma_set_qkey(struct rdma_id_private *id_priv, u32 qkey)
|
||||||
|
{
|
||||||
|
if (!qkey ||
|
||||||
|
(id_priv->qkey && (id_priv->qkey != qkey)))
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
id_priv->qkey = qkey;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
static void cma_translate_ib(struct sockaddr_ib *sib, struct rdma_dev_addr *dev_addr)
|
static void cma_translate_ib(struct sockaddr_ib *sib, struct rdma_dev_addr *dev_addr)
|
||||||
{
|
{
|
||||||
dev_addr->dev_type = ARPHRD_INFINIBAND;
|
dev_addr->dev_type = ARPHRD_INFINIBAND;
|
||||||
|
|
@ -1229,7 +1228,7 @@ static int cma_ib_init_qp_attr(struct rdma_id_private *id_priv,
|
||||||
*qp_attr_mask = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_PORT;
|
*qp_attr_mask = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_PORT;
|
||||||
|
|
||||||
if (id_priv->id.qp_type == IB_QPT_UD) {
|
if (id_priv->id.qp_type == IB_QPT_UD) {
|
||||||
ret = cma_set_qkey(id_priv, 0);
|
ret = cma_set_default_qkey(id_priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
|
|
@ -4569,7 +4568,10 @@ static int cma_send_sidr_rep(struct rdma_id_private *id_priv,
|
||||||
memset(&rep, 0, sizeof rep);
|
memset(&rep, 0, sizeof rep);
|
||||||
rep.status = status;
|
rep.status = status;
|
||||||
if (status == IB_SIDR_SUCCESS) {
|
if (status == IB_SIDR_SUCCESS) {
|
||||||
|
if (qkey)
|
||||||
ret = cma_set_qkey(id_priv, qkey);
|
ret = cma_set_qkey(id_priv, qkey);
|
||||||
|
else
|
||||||
|
ret = cma_set_default_qkey(id_priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
rep.qp_num = id_priv->qp_num;
|
rep.qp_num = id_priv->qp_num;
|
||||||
|
|
@ -4774,9 +4776,7 @@ static void cma_make_mc_event(int status, struct rdma_id_private *id_priv,
|
||||||
enum ib_gid_type gid_type;
|
enum ib_gid_type gid_type;
|
||||||
struct net_device *ndev;
|
struct net_device *ndev;
|
||||||
|
|
||||||
if (!status)
|
if (status)
|
||||||
status = cma_set_qkey(id_priv, be32_to_cpu(multicast->rec.qkey));
|
|
||||||
else
|
|
||||||
pr_debug_ratelimited("RDMA CM: MULTICAST_ERROR: failed to join multicast. status %d\n",
|
pr_debug_ratelimited("RDMA CM: MULTICAST_ERROR: failed to join multicast. status %d\n",
|
||||||
status);
|
status);
|
||||||
|
|
||||||
|
|
@ -4804,7 +4804,7 @@ static void cma_make_mc_event(int status, struct rdma_id_private *id_priv,
|
||||||
}
|
}
|
||||||
|
|
||||||
event->param.ud.qp_num = 0xFFFFFF;
|
event->param.ud.qp_num = 0xFFFFFF;
|
||||||
event->param.ud.qkey = be32_to_cpu(multicast->rec.qkey);
|
event->param.ud.qkey = id_priv->qkey;
|
||||||
|
|
||||||
out:
|
out:
|
||||||
if (ndev)
|
if (ndev)
|
||||||
|
|
@ -4823,8 +4823,11 @@ static int cma_ib_mc_handler(int status, struct ib_sa_multicast *multicast)
|
||||||
READ_ONCE(id_priv->state) == RDMA_CM_DESTROYING)
|
READ_ONCE(id_priv->state) == RDMA_CM_DESTROYING)
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
|
ret = cma_set_qkey(id_priv, be32_to_cpu(multicast->rec.qkey));
|
||||||
|
if (!ret) {
|
||||||
cma_make_mc_event(status, id_priv, multicast, &event, mc);
|
cma_make_mc_event(status, id_priv, multicast, &event, mc);
|
||||||
ret = cma_cm_event_handler(id_priv, &event);
|
ret = cma_cm_event_handler(id_priv, &event);
|
||||||
|
}
|
||||||
rdma_destroy_ah_attr(&event.param.ud.ah_attr);
|
rdma_destroy_ah_attr(&event.param.ud.ah_attr);
|
||||||
WARN_ON(ret);
|
WARN_ON(ret);
|
||||||
|
|
||||||
|
|
@ -4877,9 +4880,11 @@ static int cma_join_ib_multicast(struct rdma_id_private *id_priv,
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
ret = cma_set_qkey(id_priv, 0);
|
if (!id_priv->qkey) {
|
||||||
|
ret = cma_set_default_qkey(id_priv);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
cma_set_mgid(id_priv, (struct sockaddr *) &mc->addr, &rec.mgid);
|
cma_set_mgid(id_priv, (struct sockaddr *) &mc->addr, &rec.mgid);
|
||||||
rec.qkey = cpu_to_be32(id_priv->qkey);
|
rec.qkey = cpu_to_be32(id_priv->qkey);
|
||||||
|
|
@ -4956,9 +4961,6 @@ static int cma_iboe_join_multicast(struct rdma_id_private *id_priv,
|
||||||
cma_iboe_set_mgid(addr, &ib.rec.mgid, gid_type);
|
cma_iboe_set_mgid(addr, &ib.rec.mgid, gid_type);
|
||||||
|
|
||||||
ib.rec.pkey = cpu_to_be16(0xffff);
|
ib.rec.pkey = cpu_to_be16(0xffff);
|
||||||
if (id_priv->id.ps == RDMA_PS_UDP)
|
|
||||||
ib.rec.qkey = cpu_to_be32(RDMA_UDP_QKEY);
|
|
||||||
|
|
||||||
if (dev_addr->bound_dev_if)
|
if (dev_addr->bound_dev_if)
|
||||||
ndev = dev_get_by_index(dev_addr->net, dev_addr->bound_dev_if);
|
ndev = dev_get_by_index(dev_addr->net, dev_addr->bound_dev_if);
|
||||||
if (!ndev)
|
if (!ndev)
|
||||||
|
|
@ -4984,6 +4986,9 @@ static int cma_iboe_join_multicast(struct rdma_id_private *id_priv,
|
||||||
if (err || !ib.rec.mtu)
|
if (err || !ib.rec.mtu)
|
||||||
return err ?: -EINVAL;
|
return err ?: -EINVAL;
|
||||||
|
|
||||||
|
if (!id_priv->qkey)
|
||||||
|
cma_set_default_qkey(id_priv);
|
||||||
|
|
||||||
rdma_ip2gid((struct sockaddr *)&id_priv->id.route.addr.src_addr,
|
rdma_ip2gid((struct sockaddr *)&id_priv->id.route.addr.src_addr,
|
||||||
&ib.rec.port_gid);
|
&ib.rec.port_gid);
|
||||||
INIT_WORK(&mc->iboe_join.work, cma_iboe_join_work_handler);
|
INIT_WORK(&mc->iboe_join.work, cma_iboe_join_work_handler);
|
||||||
|
|
@ -5009,6 +5014,9 @@ int rdma_join_multicast(struct rdma_cm_id *id, struct sockaddr *addr,
|
||||||
READ_ONCE(id_priv->state) != RDMA_CM_ADDR_RESOLVED))
|
READ_ONCE(id_priv->state) != RDMA_CM_ADDR_RESOLVED))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
|
if (id_priv->id.qp_type != IB_QPT_UD)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
mc = kzalloc(sizeof(*mc), GFP_KERNEL);
|
mc = kzalloc(sizeof(*mc), GFP_KERNEL);
|
||||||
if (!mc)
|
if (!mc)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -532,6 +532,8 @@ static struct ib_ah *_rdma_create_ah(struct ib_pd *pd,
|
||||||
else
|
else
|
||||||
ret = device->ops.create_ah(ah, &init_attr, NULL);
|
ret = device->ops.create_ah(ah, &init_attr, NULL);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
|
if (ah->sgid_attr)
|
||||||
|
rdma_put_gid_attr(ah->sgid_attr);
|
||||||
kfree(ah);
|
kfree(ah);
|
||||||
return ERR_PTR(ret);
|
return ERR_PTR(ret);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -65,7 +65,7 @@ static const enum ib_wc_opcode wc_mapping_table[ERDMA_NUM_OPCODES] = {
|
||||||
[ERDMA_OP_LOCAL_INV] = IB_WC_LOCAL_INV,
|
[ERDMA_OP_LOCAL_INV] = IB_WC_LOCAL_INV,
|
||||||
[ERDMA_OP_READ_WITH_INV] = IB_WC_RDMA_READ,
|
[ERDMA_OP_READ_WITH_INV] = IB_WC_RDMA_READ,
|
||||||
[ERDMA_OP_ATOMIC_CAS] = IB_WC_COMP_SWAP,
|
[ERDMA_OP_ATOMIC_CAS] = IB_WC_COMP_SWAP,
|
||||||
[ERDMA_OP_ATOMIC_FAD] = IB_WC_FETCH_ADD,
|
[ERDMA_OP_ATOMIC_FAA] = IB_WC_FETCH_ADD,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct {
|
static const struct {
|
||||||
|
|
|
||||||
|
|
@ -441,7 +441,7 @@ struct erdma_reg_mr_sqe {
|
||||||
};
|
};
|
||||||
|
|
||||||
/* EQ related. */
|
/* EQ related. */
|
||||||
#define ERDMA_DEFAULT_EQ_DEPTH 256
|
#define ERDMA_DEFAULT_EQ_DEPTH 4096
|
||||||
|
|
||||||
/* ceqe */
|
/* ceqe */
|
||||||
#define ERDMA_CEQE_HDR_DB_MASK BIT_ULL(63)
|
#define ERDMA_CEQE_HDR_DB_MASK BIT_ULL(63)
|
||||||
|
|
@ -491,7 +491,7 @@ enum erdma_opcode {
|
||||||
ERDMA_OP_LOCAL_INV = 15,
|
ERDMA_OP_LOCAL_INV = 15,
|
||||||
ERDMA_OP_READ_WITH_INV = 16,
|
ERDMA_OP_READ_WITH_INV = 16,
|
||||||
ERDMA_OP_ATOMIC_CAS = 17,
|
ERDMA_OP_ATOMIC_CAS = 17,
|
||||||
ERDMA_OP_ATOMIC_FAD = 18,
|
ERDMA_OP_ATOMIC_FAA = 18,
|
||||||
ERDMA_NUM_OPCODES = 19,
|
ERDMA_NUM_OPCODES = 19,
|
||||||
ERDMA_OP_INVALID = ERDMA_NUM_OPCODES + 1
|
ERDMA_OP_INVALID = ERDMA_NUM_OPCODES + 1
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -56,7 +56,7 @@ done:
|
||||||
static int erdma_enum_and_get_netdev(struct erdma_dev *dev)
|
static int erdma_enum_and_get_netdev(struct erdma_dev *dev)
|
||||||
{
|
{
|
||||||
struct net_device *netdev;
|
struct net_device *netdev;
|
||||||
int ret = -ENODEV;
|
int ret = -EPROBE_DEFER;
|
||||||
|
|
||||||
/* Already binded to a net_device, so we skip. */
|
/* Already binded to a net_device, so we skip. */
|
||||||
if (dev->netdev)
|
if (dev->netdev)
|
||||||
|
|
|
||||||
|
|
@ -405,7 +405,7 @@ static int erdma_push_one_sqe(struct erdma_qp *qp, u16 *pi,
|
||||||
FIELD_PREP(ERDMA_SQE_MR_MTT_CNT_MASK,
|
FIELD_PREP(ERDMA_SQE_MR_MTT_CNT_MASK,
|
||||||
mr->mem.mtt_nents);
|
mr->mem.mtt_nents);
|
||||||
|
|
||||||
if (mr->mem.mtt_nents < ERDMA_MAX_INLINE_MTT_ENTRIES) {
|
if (mr->mem.mtt_nents <= ERDMA_MAX_INLINE_MTT_ENTRIES) {
|
||||||
attrs |= FIELD_PREP(ERDMA_SQE_MR_MTT_TYPE_MASK, 0);
|
attrs |= FIELD_PREP(ERDMA_SQE_MR_MTT_TYPE_MASK, 0);
|
||||||
/* Copy SGLs to SQE content to accelerate */
|
/* Copy SGLs to SQE content to accelerate */
|
||||||
memcpy(get_queue_entry(qp->kern_qp.sq_buf, idx + 1,
|
memcpy(get_queue_entry(qp->kern_qp.sq_buf, idx + 1,
|
||||||
|
|
@ -439,7 +439,7 @@ static int erdma_push_one_sqe(struct erdma_qp *qp, u16 *pi,
|
||||||
cpu_to_le64(atomic_wr(send_wr)->compare_add);
|
cpu_to_le64(atomic_wr(send_wr)->compare_add);
|
||||||
} else {
|
} else {
|
||||||
wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK,
|
wqe_hdr |= FIELD_PREP(ERDMA_SQE_HDR_OPCODE_MASK,
|
||||||
ERDMA_OP_ATOMIC_FAD);
|
ERDMA_OP_ATOMIC_FAA);
|
||||||
atomic_sqe->fetchadd_swap_data =
|
atomic_sqe->fetchadd_swap_data =
|
||||||
cpu_to_le64(atomic_wr(send_wr)->compare_add);
|
cpu_to_le64(atomic_wr(send_wr)->compare_add);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -11,7 +11,7 @@
|
||||||
|
|
||||||
/* RDMA Capability. */
|
/* RDMA Capability. */
|
||||||
#define ERDMA_MAX_PD (128 * 1024)
|
#define ERDMA_MAX_PD (128 * 1024)
|
||||||
#define ERDMA_MAX_SEND_WR 4096
|
#define ERDMA_MAX_SEND_WR 8192
|
||||||
#define ERDMA_MAX_ORD 128
|
#define ERDMA_MAX_ORD 128
|
||||||
#define ERDMA_MAX_IRD 128
|
#define ERDMA_MAX_IRD 128
|
||||||
#define ERDMA_MAX_SGE_RD 1
|
#define ERDMA_MAX_SGE_RD 1
|
||||||
|
|
|
||||||
|
|
@ -1458,13 +1458,15 @@ static int irdma_send_fin(struct irdma_cm_node *cm_node)
|
||||||
* irdma_find_listener - find a cm node listening on this addr-port pair
|
* irdma_find_listener - find a cm node listening on this addr-port pair
|
||||||
* @cm_core: cm's core
|
* @cm_core: cm's core
|
||||||
* @dst_addr: listener ip addr
|
* @dst_addr: listener ip addr
|
||||||
|
* @ipv4: flag indicating IPv4 when true
|
||||||
* @dst_port: listener tcp port num
|
* @dst_port: listener tcp port num
|
||||||
* @vlan_id: virtual LAN ID
|
* @vlan_id: virtual LAN ID
|
||||||
* @listener_state: state to match with listen node's
|
* @listener_state: state to match with listen node's
|
||||||
*/
|
*/
|
||||||
static struct irdma_cm_listener *
|
static struct irdma_cm_listener *
|
||||||
irdma_find_listener(struct irdma_cm_core *cm_core, u32 *dst_addr, u16 dst_port,
|
irdma_find_listener(struct irdma_cm_core *cm_core, u32 *dst_addr, bool ipv4,
|
||||||
u16 vlan_id, enum irdma_cm_listener_state listener_state)
|
u16 dst_port, u16 vlan_id,
|
||||||
|
enum irdma_cm_listener_state listener_state)
|
||||||
{
|
{
|
||||||
struct irdma_cm_listener *listen_node;
|
struct irdma_cm_listener *listen_node;
|
||||||
static const u32 ip_zero[4] = { 0, 0, 0, 0 };
|
static const u32 ip_zero[4] = { 0, 0, 0, 0 };
|
||||||
|
|
@ -1477,7 +1479,7 @@ irdma_find_listener(struct irdma_cm_core *cm_core, u32 *dst_addr, u16 dst_port,
|
||||||
list_for_each_entry (listen_node, &cm_core->listen_list, list) {
|
list_for_each_entry (listen_node, &cm_core->listen_list, list) {
|
||||||
memcpy(listen_addr, listen_node->loc_addr, sizeof(listen_addr));
|
memcpy(listen_addr, listen_node->loc_addr, sizeof(listen_addr));
|
||||||
listen_port = listen_node->loc_port;
|
listen_port = listen_node->loc_port;
|
||||||
if (listen_port != dst_port ||
|
if (listen_node->ipv4 != ipv4 || listen_port != dst_port ||
|
||||||
!(listener_state & listen_node->listener_state))
|
!(listener_state & listen_node->listener_state))
|
||||||
continue;
|
continue;
|
||||||
/* compare node pair, return node handle if a match */
|
/* compare node pair, return node handle if a match */
|
||||||
|
|
@ -2902,7 +2904,8 @@ irdma_make_listen_node(struct irdma_cm_core *cm_core,
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
/* cannot have multiple matching listeners */
|
/* cannot have multiple matching listeners */
|
||||||
listener = irdma_find_listener(cm_core, cm_info->loc_addr,
|
listener =
|
||||||
|
irdma_find_listener(cm_core, cm_info->loc_addr, cm_info->ipv4,
|
||||||
cm_info->loc_port, cm_info->vlan_id,
|
cm_info->loc_port, cm_info->vlan_id,
|
||||||
IRDMA_CM_LISTENER_EITHER_STATE);
|
IRDMA_CM_LISTENER_EITHER_STATE);
|
||||||
if (listener &&
|
if (listener &&
|
||||||
|
|
@ -3153,6 +3156,7 @@ void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf)
|
||||||
|
|
||||||
listener = irdma_find_listener(cm_core,
|
listener = irdma_find_listener(cm_core,
|
||||||
cm_info.loc_addr,
|
cm_info.loc_addr,
|
||||||
|
cm_info.ipv4,
|
||||||
cm_info.loc_port,
|
cm_info.loc_port,
|
||||||
cm_info.vlan_id,
|
cm_info.vlan_id,
|
||||||
IRDMA_CM_LISTENER_ACTIVE_STATE);
|
IRDMA_CM_LISTENER_ACTIVE_STATE);
|
||||||
|
|
|
||||||
|
|
@ -41,7 +41,7 @@
|
||||||
#define TCP_OPTIONS_PADDING 3
|
#define TCP_OPTIONS_PADDING 3
|
||||||
|
|
||||||
#define IRDMA_DEFAULT_RETRYS 64
|
#define IRDMA_DEFAULT_RETRYS 64
|
||||||
#define IRDMA_DEFAULT_RETRANS 8
|
#define IRDMA_DEFAULT_RETRANS 32
|
||||||
#define IRDMA_DEFAULT_TTL 0x40
|
#define IRDMA_DEFAULT_TTL 0x40
|
||||||
#define IRDMA_DEFAULT_RTT_VAR 6
|
#define IRDMA_DEFAULT_RTT_VAR 6
|
||||||
#define IRDMA_DEFAULT_SS_THRESH 0x3fffffff
|
#define IRDMA_DEFAULT_SS_THRESH 0x3fffffff
|
||||||
|
|
|
||||||
|
|
@ -41,6 +41,7 @@ static enum irdma_hmc_rsrc_type iw_hmc_obj_types[] = {
|
||||||
IRDMA_HMC_IW_XFFL,
|
IRDMA_HMC_IW_XFFL,
|
||||||
IRDMA_HMC_IW_Q1,
|
IRDMA_HMC_IW_Q1,
|
||||||
IRDMA_HMC_IW_Q1FL,
|
IRDMA_HMC_IW_Q1FL,
|
||||||
|
IRDMA_HMC_IW_PBLE,
|
||||||
IRDMA_HMC_IW_TIMER,
|
IRDMA_HMC_IW_TIMER,
|
||||||
IRDMA_HMC_IW_FSIMC,
|
IRDMA_HMC_IW_FSIMC,
|
||||||
IRDMA_HMC_IW_FSIAV,
|
IRDMA_HMC_IW_FSIAV,
|
||||||
|
|
@ -827,6 +828,8 @@ static int irdma_create_hmc_objs(struct irdma_pci_f *rf, bool privileged,
|
||||||
info.entry_type = rf->sd_type;
|
info.entry_type = rf->sd_type;
|
||||||
|
|
||||||
for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++) {
|
for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++) {
|
||||||
|
if (iw_hmc_obj_types[i] == IRDMA_HMC_IW_PBLE)
|
||||||
|
continue;
|
||||||
if (dev->hmc_info->hmc_obj[iw_hmc_obj_types[i]].cnt) {
|
if (dev->hmc_info->hmc_obj[iw_hmc_obj_types[i]].cnt) {
|
||||||
info.rsrc_type = iw_hmc_obj_types[i];
|
info.rsrc_type = iw_hmc_obj_types[i];
|
||||||
info.count = dev->hmc_info->hmc_obj[info.rsrc_type].cnt;
|
info.count = dev->hmc_info->hmc_obj[info.rsrc_type].cnt;
|
||||||
|
|
|
||||||
|
|
@ -2595,7 +2595,10 @@ void irdma_generate_flush_completions(struct irdma_qp *iwqp)
|
||||||
/* remove the SQ WR by moving SQ tail*/
|
/* remove the SQ WR by moving SQ tail*/
|
||||||
IRDMA_RING_SET_TAIL(*sq_ring,
|
IRDMA_RING_SET_TAIL(*sq_ring,
|
||||||
sq_ring->tail + qp->sq_wrtrk_array[sq_ring->tail].quanta);
|
sq_ring->tail + qp->sq_wrtrk_array[sq_ring->tail].quanta);
|
||||||
|
if (cmpl->cpi.op_type == IRDMAQP_OP_NOP) {
|
||||||
|
kfree(cmpl);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
ibdev_dbg(iwqp->iwscq->ibcq.device,
|
ibdev_dbg(iwqp->iwscq->ibcq.device,
|
||||||
"DEV: %s: adding wr_id = 0x%llx SQ Completion to list qp_id=%d\n",
|
"DEV: %s: adding wr_id = 0x%llx SQ Completion to list qp_id=%d\n",
|
||||||
__func__, cmpl->cpi.wr_id, qp->qp_id);
|
__func__, cmpl->cpi.wr_id, qp->qp_id);
|
||||||
|
|
|
||||||
|
|
@ -442,6 +442,10 @@ static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u16 *active_speed,
|
||||||
*active_width = IB_WIDTH_2X;
|
*active_width = IB_WIDTH_2X;
|
||||||
*active_speed = IB_SPEED_NDR;
|
*active_speed = IB_SPEED_NDR;
|
||||||
break;
|
break;
|
||||||
|
case MLX5E_PROT_MASK(MLX5E_400GAUI_8):
|
||||||
|
*active_width = IB_WIDTH_8X;
|
||||||
|
*active_speed = IB_SPEED_HDR;
|
||||||
|
break;
|
||||||
case MLX5E_PROT_MASK(MLX5E_400GAUI_4_400GBASE_CR4_KR4):
|
case MLX5E_PROT_MASK(MLX5E_400GAUI_4_400GBASE_CR4_KR4):
|
||||||
*active_width = IB_WIDTH_4X;
|
*active_width = IB_WIDTH_4X;
|
||||||
*active_speed = IB_SPEED_NDR;
|
*active_speed = IB_SPEED_NDR;
|
||||||
|
|
|
||||||
|
|
@ -410,6 +410,7 @@ static struct memstick_dev *memstick_alloc_card(struct memstick_host *host)
|
||||||
return card;
|
return card;
|
||||||
err_out:
|
err_out:
|
||||||
host->card = old_card;
|
host->card = old_card;
|
||||||
|
kfree_const(card->dev.kobj.name);
|
||||||
kfree(card);
|
kfree(card);
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
@ -468,9 +469,11 @@ static void memstick_check(struct work_struct *work)
|
||||||
put_device(&card->dev);
|
put_device(&card->dev);
|
||||||
host->card = NULL;
|
host->card = NULL;
|
||||||
}
|
}
|
||||||
} else
|
} else {
|
||||||
|
kfree_const(card->dev.kobj.name);
|
||||||
kfree(card);
|
kfree(card);
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
out_power_off:
|
out_power_off:
|
||||||
if (!host->card)
|
if (!host->card)
|
||||||
|
|
|
||||||
|
|
@ -351,8 +351,6 @@ static void sdhci_am654_write_b(struct sdhci_host *host, u8 val, int reg)
|
||||||
*/
|
*/
|
||||||
case MMC_TIMING_SD_HS:
|
case MMC_TIMING_SD_HS:
|
||||||
case MMC_TIMING_MMC_HS:
|
case MMC_TIMING_MMC_HS:
|
||||||
case MMC_TIMING_UHS_SDR12:
|
|
||||||
case MMC_TIMING_UHS_SDR25:
|
|
||||||
val &= ~SDHCI_CTRL_HISPD;
|
val &= ~SDHCI_CTRL_HISPD;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -666,12 +666,6 @@ static int io_init(struct ubi_device *ubi, int max_beb_per1024)
|
||||||
ubi->ec_hdr_alsize = ALIGN(UBI_EC_HDR_SIZE, ubi->hdrs_min_io_size);
|
ubi->ec_hdr_alsize = ALIGN(UBI_EC_HDR_SIZE, ubi->hdrs_min_io_size);
|
||||||
ubi->vid_hdr_alsize = ALIGN(UBI_VID_HDR_SIZE, ubi->hdrs_min_io_size);
|
ubi->vid_hdr_alsize = ALIGN(UBI_VID_HDR_SIZE, ubi->hdrs_min_io_size);
|
||||||
|
|
||||||
if (ubi->vid_hdr_offset && ((ubi->vid_hdr_offset + UBI_VID_HDR_SIZE) >
|
|
||||||
ubi->vid_hdr_alsize)) {
|
|
||||||
ubi_err(ubi, "VID header offset %d too large.", ubi->vid_hdr_offset);
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
dbg_gen("min_io_size %d", ubi->min_io_size);
|
dbg_gen("min_io_size %d", ubi->min_io_size);
|
||||||
dbg_gen("max_write_size %d", ubi->max_write_size);
|
dbg_gen("max_write_size %d", ubi->max_write_size);
|
||||||
dbg_gen("hdrs_min_io_size %d", ubi->hdrs_min_io_size);
|
dbg_gen("hdrs_min_io_size %d", ubi->hdrs_min_io_size);
|
||||||
|
|
@ -689,6 +683,21 @@ static int io_init(struct ubi_device *ubi, int max_beb_per1024)
|
||||||
ubi->vid_hdr_aloffset;
|
ubi->vid_hdr_aloffset;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Memory allocation for VID header is ubi->vid_hdr_alsize
|
||||||
|
* which is described in comments in io.c.
|
||||||
|
* Make sure VID header shift + UBI_VID_HDR_SIZE not exceeds
|
||||||
|
* ubi->vid_hdr_alsize, so that all vid header operations
|
||||||
|
* won't access memory out of bounds.
|
||||||
|
*/
|
||||||
|
if ((ubi->vid_hdr_shift + UBI_VID_HDR_SIZE) > ubi->vid_hdr_alsize) {
|
||||||
|
ubi_err(ubi, "Invalid VID header offset %d, VID header shift(%d)"
|
||||||
|
" + VID header size(%zu) > VID header aligned size(%d).",
|
||||||
|
ubi->vid_hdr_offset, ubi->vid_hdr_shift,
|
||||||
|
UBI_VID_HDR_SIZE, ubi->vid_hdr_alsize);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
/* Similar for the data offset */
|
/* Similar for the data offset */
|
||||||
ubi->leb_start = ubi->vid_hdr_offset + UBI_VID_HDR_SIZE;
|
ubi->leb_start = ubi->vid_hdr_offset + UBI_VID_HDR_SIZE;
|
||||||
ubi->leb_start = ALIGN(ubi->leb_start, ubi->min_io_size);
|
ubi->leb_start = ALIGN(ubi->leb_start, ubi->min_io_size);
|
||||||
|
|
|
||||||
|
|
@ -575,7 +575,7 @@ static int erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk,
|
||||||
* @vol_id: the volume ID that last used this PEB
|
* @vol_id: the volume ID that last used this PEB
|
||||||
* @lnum: the last used logical eraseblock number for the PEB
|
* @lnum: the last used logical eraseblock number for the PEB
|
||||||
* @torture: if the physical eraseblock has to be tortured
|
* @torture: if the physical eraseblock has to be tortured
|
||||||
* @nested: denotes whether the work_sem is already held in read mode
|
* @nested: denotes whether the work_sem is already held
|
||||||
*
|
*
|
||||||
* This function returns zero in case of success and a %-ENOMEM in case of
|
* This function returns zero in case of success and a %-ENOMEM in case of
|
||||||
* failure.
|
* failure.
|
||||||
|
|
@ -1131,7 +1131,7 @@ static int __erase_worker(struct ubi_device *ubi, struct ubi_work *wl_wrk)
|
||||||
int err1;
|
int err1;
|
||||||
|
|
||||||
/* Re-schedule the LEB for erasure */
|
/* Re-schedule the LEB for erasure */
|
||||||
err1 = schedule_erase(ubi, e, vol_id, lnum, 0, false);
|
err1 = schedule_erase(ubi, e, vol_id, lnum, 0, true);
|
||||||
if (err1) {
|
if (err1) {
|
||||||
spin_lock(&ubi->wl_lock);
|
spin_lock(&ubi->wl_lock);
|
||||||
wl_entry_destroy(ubi, e);
|
wl_entry_destroy(ubi, e);
|
||||||
|
|
|
||||||
|
|
@ -1777,14 +1777,15 @@ void bond_lower_state_changed(struct slave *slave)
|
||||||
|
|
||||||
/* The bonding driver uses ether_setup() to convert a master bond device
|
/* The bonding driver uses ether_setup() to convert a master bond device
|
||||||
* to ARPHRD_ETHER, that resets the target netdevice's flags so we always
|
* to ARPHRD_ETHER, that resets the target netdevice's flags so we always
|
||||||
* have to restore the IFF_MASTER flag, and only restore IFF_SLAVE if it was set
|
* have to restore the IFF_MASTER flag, and only restore IFF_SLAVE and IFF_UP
|
||||||
|
* if they were set
|
||||||
*/
|
*/
|
||||||
static void bond_ether_setup(struct net_device *bond_dev)
|
static void bond_ether_setup(struct net_device *bond_dev)
|
||||||
{
|
{
|
||||||
unsigned int slave_flag = bond_dev->flags & IFF_SLAVE;
|
unsigned int flags = bond_dev->flags & (IFF_SLAVE | IFF_UP);
|
||||||
|
|
||||||
ether_setup(bond_dev);
|
ether_setup(bond_dev);
|
||||||
bond_dev->flags |= IFF_MASTER | slave_flag;
|
bond_dev->flags |= IFF_MASTER | flags;
|
||||||
bond_dev->priv_flags &= ~IFF_TX_SKB_SHARING;
|
bond_dev->priv_flags &= ~IFF_TX_SKB_SHARING;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -96,7 +96,7 @@ static int ksz8795_change_mtu(struct ksz_device *dev, int frame_size)
|
||||||
|
|
||||||
if (frame_size > KSZ8_LEGAL_PACKET_SIZE)
|
if (frame_size > KSZ8_LEGAL_PACKET_SIZE)
|
||||||
ctrl2 |= SW_LEGAL_PACKET_DISABLE;
|
ctrl2 |= SW_LEGAL_PACKET_DISABLE;
|
||||||
else if (frame_size > KSZ8863_NORMAL_PACKET_SIZE)
|
if (frame_size > KSZ8863_NORMAL_PACKET_SIZE)
|
||||||
ctrl1 |= SW_HUGE_PACKET;
|
ctrl1 |= SW_HUGE_PACKET;
|
||||||
|
|
||||||
ret = ksz_rmw8(dev, REG_SW_CTRL_1, SW_HUGE_PACKET, ctrl1);
|
ret = ksz_rmw8(dev, REG_SW_CTRL_1, SW_HUGE_PACKET, ctrl1);
|
||||||
|
|
|
||||||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Reference in a new issue