niansa-misc/linux
1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
Code Issues Projects Releases Packages Wiki Activity

USB: ehci-omap: Remove PHY reset handling code

Browse source 
Reset GPIO handling for the PHY must be done in the PHY
driver. We use the PHY helpers instead to reset the PHY.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Roger Quadros 2013-03-12 12:44:42 +02:00 • committed by Greg Kroah-Hartman
parent dcd64063fd
commit 87425ad363
1 changed files with 10 additions and 62 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

72
drivers/usb/host/ehci-omap.c
View file

@ -86,79 +86,27 @@ static inline u32 ehci_read(void __iomem *base, u32 reg)
return __raw_readl(base + reg); return __raw_readl(base + reg);
} }
static void omap_ehci_soft_phy_reset(struct usb_hcd *hcd, u8 port)
{
unsigned long timeout = jiffies + msecs_to_jiffies(1000);
unsigned reg = 0;
reg = ULPI_FUNC_CTRL_RESET
/* FUNCTION_CTRL_SET register */
| (ULPI_SET(ULPI_FUNC_CTRL) << EHCI_INSNREG05_ULPI_REGADD_SHIFT)
/* Write */
| (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT)
/* PORTn */
| ((port + 1) << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT)
/* start ULPI access*/
| (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT);
ehci_write(hcd->regs, EHCI_INSNREG05_ULPI, reg);
/* Wait for ULPI access completion */
while ((ehci_read(hcd->regs, EHCI_INSNREG05_ULPI)
& (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT))) {
cpu_relax();
if (time_after(jiffies, timeout)) {
dev_dbg(hcd->self.controller,
"phy reset operation timed out\n");
break;
}
}
}
static int omap_ehci_init(struct usb_hcd *hcd) static int omap_ehci_init(struct usb_hcd *hcd)
{ {
struct ehci_hcd *ehci = hcd_to_ehci(hcd); struct ehci_hcd *ehci = hcd_to_ehci(hcd);
int rc; struct omap_hcd *omap = (struct omap_hcd *)ehci->priv;
struct usbhs_omap_platform_data *pdata; int rc, i;
pdata = hcd->self.controller->platform_data;
/* Hold PHYs in reset while initializing EHCI controller */ /* Hold PHYs in reset while initializing EHCI controller */
if (pdata->phy_reset) { for (i = 0; i < omap->nports; i++) {
if (gpio_is_valid(pdata->reset_gpio_port[0])) if (omap->phy[i])
gpio_set_value_cansleep(pdata->reset_gpio_port[0], 0); usb_phy_shutdown(omap->phy[i]);
if (gpio_is_valid(pdata->reset_gpio_port[1]))
gpio_set_value_cansleep(pdata->reset_gpio_port[1], 0);
/* Hold the PHY in RESET for enough time till DIR is high */
udelay(10);
} }
/* Soft reset the PHY using PHY reset command over ULPI */
if (pdata->port_mode[0] == OMAP_EHCI_PORT_MODE_PHY)
omap_ehci_soft_phy_reset(hcd, 0);
if (pdata->port_mode[1] == OMAP_EHCI_PORT_MODE_PHY)
omap_ehci_soft_phy_reset(hcd, 1);
/* we know this is the memory we want, no need to ioremap again */ /* we know this is the memory we want, no need to ioremap again */
ehci->caps = hcd->regs; ehci->caps = hcd->regs;
rc = ehci_setup(hcd); rc = ehci_setup(hcd);
if (pdata->phy_reset) { /* Bring PHYs out of reset */
/* Hold the PHY in RESET for enough time till for (i = 0; i < omap->nports; i++) {
* PHY is settled and ready if (omap->phy[i])
*/ usb_phy_init(omap->phy[i]);
udelay(10);
if (gpio_is_valid(pdata->reset_gpio_port[0]))
gpio_set_value_cansleep(pdata->reset_gpio_port[0], 1);
if (gpio_is_valid(pdata->reset_gpio_port[1]))
gpio_set_value_cansleep(pdata->reset_gpio_port[1], 1);
} }
return rc; return rc;