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drm/amd/display: initialize all the dpm level's stutter latency

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Fix issue when override level bigger than default. Levels 5, 6, and 7
had zero stutter latency, this is because override level being
initialized after stutter latency inits.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Syed Hassan <syed.hassan@amd.com>
Reviewed-by: Allen Pan <allen.pan@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2023-12-01 06:24:58 -07:00 • committed by Alex Deucher
parent e57cd73f97
commit 885c71ad79
1 changed files with 3 additions and 1 deletions
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4
drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c
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@ -341,6 +341,9 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,
break; break;
} }
if (dml2->config.bbox_overrides.clks_table.num_states)
p->in_states->num_states = dml2->config.bbox_overrides.clks_table.num_states;
/* Override from passed values, if available */ /* Override from passed values, if available */
for (i = 0; i < p->in_states->num_states; i++) { for (i = 0; i < p->in_states->num_states; i++) {
if (dml2->config.bbox_overrides.sr_exit_latency_us) { if (dml2->config.bbox_overrides.sr_exit_latency_us) {
@ -397,7 +400,6 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc,
} }
/* Copy clocks tables entries, if available */ /* Copy clocks tables entries, if available */
if (dml2->config.bbox_overrides.clks_table.num_states) { if (dml2->config.bbox_overrides.clks_table.num_states) {
p->in_states->num_states = dml2->config.bbox_overrides.clks_table.num_states;
for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels; i++) { for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels; i++) {
p->in_states->state_array[i].dcfclk_mhz = dml2->config.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz; p->in_states->state_array[i].dcfclk_mhz = dml2->config.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz;