KVM: arm64: Save/restore SVE state for nVHE
Implement the SVE save/restore for nVHE, following a similar logic to that of the VHE implementation: - the SVE state is switched on trap from EL1 to EL2 - no further changes to ZCR_EL2 occur as long as the guest isn't preempted or exit to userspace - ZCR_EL2 is reset to its default value on the first SVE access from the host EL1, and ZCR_EL1 restored to the default guest value in vcpu_put() Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org>
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3 changed files with 23 additions and 28 deletions
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@ -121,11 +121,17 @@ void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu)
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local_irq_save(flags);
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local_irq_save(flags);
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if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) {
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if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) {
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if (guest_has_sve)
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if (guest_has_sve) {
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__vcpu_sys_reg(vcpu, ZCR_EL1) = read_sysreg_el1(SYS_ZCR);
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__vcpu_sys_reg(vcpu, ZCR_EL1) = read_sysreg_el1(SYS_ZCR);
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/* Restore the VL that was saved when bound to the CPU */
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if (!has_vhe())
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sve_cond_update_zcr_vq(vcpu_sve_max_vq(vcpu) - 1,
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SYS_ZCR_EL1);
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}
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fpsimd_save_and_flush_cpu_state();
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fpsimd_save_and_flush_cpu_state();
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} else if (host_has_sve) {
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} else if (has_vhe() && host_has_sve) {
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/*
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/*
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* The FPSIMD/SVE state in the CPU has not been touched, and we
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* The FPSIMD/SVE state in the CPU has not been touched, and we
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* have SVE (and VHE): CPACR_EL1 (alias CPTR_EL2) has been
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* have SVE (and VHE): CPACR_EL1 (alias CPTR_EL2) has been
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@ -217,25 +217,19 @@ static inline void __hyp_sve_restore_guest(struct kvm_vcpu *vcpu)
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/* Check for an FPSIMD/SVE trap and handle as appropriate */
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/* Check for an FPSIMD/SVE trap and handle as appropriate */
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static inline bool __hyp_handle_fpsimd(struct kvm_vcpu *vcpu)
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static inline bool __hyp_handle_fpsimd(struct kvm_vcpu *vcpu)
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{
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{
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bool vhe, sve_guest, sve_host;
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bool sve_guest, sve_host;
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u8 esr_ec;
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u8 esr_ec;
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u64 reg;
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if (!system_supports_fpsimd())
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if (!system_supports_fpsimd())
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return false;
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return false;
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/*
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if (system_supports_sve()) {
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* Currently system_supports_sve() currently implies has_vhe(),
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* so the check is redundant. However, has_vhe() can be determined
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* statically and helps the compiler remove dead code.
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*/
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if (has_vhe() && system_supports_sve()) {
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sve_guest = vcpu_has_sve(vcpu);
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sve_guest = vcpu_has_sve(vcpu);
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sve_host = vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE;
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sve_host = vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE;
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vhe = true;
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} else {
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} else {
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sve_guest = false;
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sve_guest = false;
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sve_host = false;
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sve_host = false;
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vhe = has_vhe();
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}
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}
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esr_ec = kvm_vcpu_trap_get_class(vcpu);
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esr_ec = kvm_vcpu_trap_get_class(vcpu);
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@ -244,31 +238,26 @@ static inline bool __hyp_handle_fpsimd(struct kvm_vcpu *vcpu)
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return false;
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return false;
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/* Don't handle SVE traps for non-SVE vcpus here: */
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/* Don't handle SVE traps for non-SVE vcpus here: */
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if (!sve_guest)
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if (!sve_guest && esr_ec != ESR_ELx_EC_FP_ASIMD)
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if (esr_ec != ESR_ELx_EC_FP_ASIMD)
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return false;
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return false;
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/* Valid trap. Switch the context: */
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/* Valid trap. Switch the context: */
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if (has_vhe()) {
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if (vhe) {
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reg = CPACR_EL1_FPEN;
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u64 reg = read_sysreg(cpacr_el1) | CPACR_EL1_FPEN;
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if (sve_guest)
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if (sve_guest)
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reg |= CPACR_EL1_ZEN;
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reg |= CPACR_EL1_ZEN;
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write_sysreg(reg, cpacr_el1);
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sysreg_clear_set(cpacr_el1, 0, reg);
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} else {
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} else {
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write_sysreg(read_sysreg(cptr_el2) & ~(u64)CPTR_EL2_TFP,
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reg = CPTR_EL2_TFP;
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cptr_el2);
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if (sve_guest)
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}
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reg |= CPTR_EL2_TZ;
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sysreg_clear_set(cptr_el2, reg, 0);
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}
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isb();
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isb();
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if (vcpu->arch.flags & KVM_ARM64_FP_HOST) {
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if (vcpu->arch.flags & KVM_ARM64_FP_HOST) {
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/*
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* In the SVE case, VHE is assumed: it is enforced by
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* Kconfig and kvm_arch_init().
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*/
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if (sve_host)
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if (sve_host)
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__hyp_sve_save_host(vcpu);
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__hyp_sve_save_host(vcpu);
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else
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else
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@ -41,9 +41,9 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
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__activate_traps_common(vcpu);
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__activate_traps_common(vcpu);
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val = CPTR_EL2_DEFAULT;
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val = CPTR_EL2_DEFAULT;
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val |= CPTR_EL2_TTA | CPTR_EL2_TZ | CPTR_EL2_TAM;
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val |= CPTR_EL2_TTA | CPTR_EL2_TAM;
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if (!update_fp_enabled(vcpu)) {
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if (!update_fp_enabled(vcpu)) {
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val |= CPTR_EL2_TFP;
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val |= CPTR_EL2_TFP | CPTR_EL2_TZ;
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__activate_traps_fpsimd32(vcpu);
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__activate_traps_fpsimd32(vcpu);
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}
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}
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