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drm/amd/display: Guard ASSR with internal display flag

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[Why]
ASSR enabling only considers capability declared in DPCD.
We also need to check whether the connector is internal.

[How]
ASSR enabling need to check both DPCD capability and internal display
flag.

Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Stylon Wang 2021-03-02 19:25:56 +08:00 • committed by Alex Deucher
parent 6c8e1f3b95
commit 9127daa0a8
1 changed files with 41 additions and 17 deletions
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58
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
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@ -1635,6 +1635,42 @@ enum link_training_result dc_link_dp_perform_link_training(
return status; return status;
} }
static enum dp_panel_mode try_enable_assr(struct dc_stream_state *stream)
{
struct dc_link *link = stream->link;
enum dp_panel_mode panel_mode = dp_get_panel_mode(link);
#ifdef CONFIG_DRM_AMD_DC_HDCP
struct cp_psp *cp_psp = &stream->ctx->cp_psp;
#endif
/* ASSR must be supported on the panel */
if (panel_mode == DP_PANEL_MODE_DEFAULT)
return panel_mode;
/* eDP or internal DP only */
if (link->connector_signal != SIGNAL_TYPE_EDP &&
!(link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT &&
link->is_internal_display))
return DP_PANEL_MODE_DEFAULT;
#ifdef CONFIG_DRM_AMD_DC_HDCP
if (cp_psp && cp_psp->funcs.enable_assr) {
if (!cp_psp->funcs.enable_assr(cp_psp->handle, link)) {
/* since eDP implies ASSR on, change panel
* mode to disable ASSR
*/
panel_mode = DP_PANEL_MODE_DEFAULT;
}
} else
panel_mode = DP_PANEL_MODE_DEFAULT;
#else
/* turn off ASSR if the implementation is not compiled in */
panel_mode = DP_PANEL_MODE_DEFAULT;
#endif
return panel_mode;
}
bool perform_link_training_with_retries( bool perform_link_training_with_retries(
const struct dc_link_settings *link_setting, const struct dc_link_settings *link_setting,
bool skip_video_pattern, bool skip_video_pattern,
@ -1646,7 +1682,7 @@ bool perform_link_training_with_retries(
uint8_t delay_between_attempts = LINK_TRAINING_RETRY_DELAY; uint8_t delay_between_attempts = LINK_TRAINING_RETRY_DELAY;
struct dc_stream_state *stream = pipe_ctx->stream; struct dc_stream_state *stream = pipe_ctx->stream;
struct dc_link *link = stream->link; struct dc_link *link = stream->link;
enum dp_panel_mode panel_mode = dp_get_panel_mode(link); enum dp_panel_mode panel_mode;
/* We need to do this before the link training to ensure the idle pattern in SST /* We need to do this before the link training to ensure the idle pattern in SST
* mode will be sent right after the link training * mode will be sent right after the link training
@ -1671,23 +1707,11 @@ bool perform_link_training_with_retries(
msleep(delay_dp_power_up_in_ms); msleep(delay_dp_power_up_in_ms);
} }
#ifdef CONFIG_DRM_AMD_DC_HDCP panel_mode = try_enable_assr(stream);
if (panel_mode == DP_PANEL_MODE_EDP) {
struct cp_psp *cp_psp = &stream->ctx->cp_psp;
if (cp_psp && cp_psp->funcs.enable_assr) {
if (!cp_psp->funcs.enable_assr(cp_psp->handle, link)) {
/* since eDP implies ASSR on, change panel
* mode to disable ASSR
*/
panel_mode = DP_PANEL_MODE_DEFAULT;
}
} else
panel_mode = DP_PANEL_MODE_DEFAULT;
}
#endif
dp_set_panel_mode(link, panel_mode); dp_set_panel_mode(link, panel_mode);
DC_LOG_DETECTION_DP_CAPS("Link: %d ASSR enabled: %d\n",
link->link_index,
panel_mode != DP_PANEL_MODE_DEFAULT);
if (link->aux_access_disabled) { if (link->aux_access_disabled) {
dc_link_dp_perform_link_training_skip_aux(link, link_setting); dc_link_dp_perform_link_training_skip_aux(link, link_setting);