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drm/amdgpu/jpeg: cancel the jpeg worker

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Looks like these got missed when jpeg was split from vcn.
Cancel the jpeg workers rather than vcn workers.

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2024-11-13 14:28:54 -05:00
parent b61badd20b
commit 93df748737
7 changed files with 7 additions and 7 deletions
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2
drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c
View file

@ -604,7 +604,7 @@ static void jpeg_v1_0_set_irq_funcs(struct amdgpu_device *adev)
static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring) static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work); bool set_clocks = !cancel_delayed_work_sync(&adev->jpeg.idle_work);
int cnt = 0; int cnt = 0;
mutex_lock(&adev->vcn.vcn1_jpeg1_workaround); mutex_lock(&adev->vcn.vcn1_jpeg1_workaround);

2
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
View file

@ -150,7 +150,7 @@ static int jpeg_v2_0_hw_fini(struct amdgpu_ip_block *ip_block)
{ {
struct amdgpu_device *adev = ip_block->adev; struct amdgpu_device *adev = ip_block->adev;
cancel_delayed_work_sync(&adev->vcn.idle_work); cancel_delayed_work_sync(&adev->jpeg.idle_work);
if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS)) RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS))

2
drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
View file

@ -211,7 +211,7 @@ static int jpeg_v2_5_hw_fini(struct amdgpu_ip_block *ip_block)
struct amdgpu_device *adev = ip_block->adev; struct amdgpu_device *adev = ip_block->adev;
int i; int i;
cancel_delayed_work_sync(&adev->vcn.idle_work); cancel_delayed_work_sync(&adev->jpeg.idle_work);
for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
if (adev->jpeg.harvest_config & (1 << i)) if (adev->jpeg.harvest_config & (1 << i))

2
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
View file

@ -164,7 +164,7 @@ static int jpeg_v3_0_hw_fini(struct amdgpu_ip_block *ip_block)
{ {
struct amdgpu_device *adev = ip_block->adev; struct amdgpu_device *adev = ip_block->adev;
cancel_delayed_work_sync(&adev->vcn.idle_work); cancel_delayed_work_sync(&adev->jpeg.idle_work);
if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS)) RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS))

2
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
View file

@ -202,7 +202,7 @@ static int jpeg_v4_0_hw_fini(struct amdgpu_ip_block *ip_block)
{ {
struct amdgpu_device *adev = ip_block->adev; struct amdgpu_device *adev = ip_block->adev;
cancel_delayed_work_sync(&adev->vcn.idle_work); cancel_delayed_work_sync(&adev->jpeg.idle_work);
if (!amdgpu_sriov_vf(adev)) { if (!amdgpu_sriov_vf(adev)) {
if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
RREG32_SOC15(JPEG, 0, regUVD_JRBC_STATUS)) RREG32_SOC15(JPEG, 0, regUVD_JRBC_STATUS))

2
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
View file

@ -227,7 +227,7 @@ static int jpeg_v4_0_5_hw_fini(struct amdgpu_ip_block *ip_block)
struct amdgpu_device *adev = ip_block->adev; struct amdgpu_device *adev = ip_block->adev;
int i; int i;
cancel_delayed_work_sync(&adev->vcn.idle_work); cancel_delayed_work_sync(&adev->jpeg.idle_work);
for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
if (adev->jpeg.harvest_config & (1 << i)) if (adev->jpeg.harvest_config & (1 << i))

2
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
View file

@ -168,7 +168,7 @@ static int jpeg_v5_0_0_hw_fini(struct amdgpu_ip_block *ip_block)
{ {
struct amdgpu_device *adev = ip_block->adev; struct amdgpu_device *adev = ip_block->adev;
cancel_delayed_work_sync(&adev->vcn.idle_work); cancel_delayed_work_sync(&adev->jpeg.idle_work);
if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&
RREG32_SOC15(JPEG, 0, regUVD_JRBC_STATUS)) RREG32_SOC15(JPEG, 0, regUVD_JRBC_STATUS))