asm-generic updates for v6.1
This contains a series from Linus Walleij to unify the linux/io.h interface by making the ia64, alpha, parisc and sparc include asm-generic/io.h. All functions provided by the generic header are now available to all drivers, but the architectures can still override this. For the moment, mips and sh still don't include asm-generic/io.h but provide a full set of functions themselves. There are also a few minor cleanups unrelated to this. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM8L6sACgkQmmx57+YA GNnmKg/9EgTf+0+KoQ193Xhvav2niOud/AQP2H5wvKlt4csIq5CRb8cHMYYSpmn5 MzifFA4/meeVkbh0LPX4Hue6XqegIe14CRZtIYep5yc1DGjLzEGHTWxkxDWZ5LK9 8mUVPsm7ddCDt99XmI2mZNgy4Qktn3ePo1N+4tgmeadYdYXQXXsL1H1HlfQeVNRk IGvsGx/75QkhOrA20xNL+uwQ9n6ekdwOgj2Z2Q3SHNJPNpyPJLcspBbZ6HEMUG6/ NnEnfqVOz9i1Nonx7Gf6gKXvgRzyU4AIaUW0xADBwtY5/Yq3bC0LQj4HTANkmWo8 lBHAoSm3GicrzMMFb5eeKHkePX5iGSiTChB+TBWN/3Ofxzfma668lDuxdFYGOW+F gK5UsYZXpMuKuVTdWpp2k+swFkNtlBOQoYE6kE2NOLkR40FjaxS67LPAbDMtY9mb WIw10waN5dX0Dxv+ecJoaiQ7TeoIT5zI1plXeh1eJqARHmBX+o45tsVDSZAEvwNG EoVRjtG/aJDXwPDI2OiohEwckadIUnDbnXQI4DOgACy8MPkNITrth6E/Xnv3sAtx QLAojsMp6A3BNlen7LoyWpCWeb177OdnQZJmVVEar8cqAcWX+6HtMtlDIGi1dvEq Wl8JLysHk5jXdqNGYiKYtT8ocGZux0x2fYT/x/OnetBkn5D3DrE= =4dNP -----END PGP SIGNATURE----- Merge tag 'asm-generic-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "This contains a series from Linus Walleij to unify the linux/io.h interface by making the ia64, alpha, parisc and sparc include asm-generic/io.h. All functions provided by the generic header are now available to all drivers, but the architectures can still override this. For the moment, mips and sh still don't include asm-generic/io.h but provide a full set of functions themselves. There are also a few minor cleanups unrelated to this" * tag 'asm-generic-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: alpha: add full ioread64/iowrite64 implementation parisc: Drop homebrewn io[read|write]64_[lo_hi|hi_lo] parisc: hide ioread64 declaration on 32-bit ia64: export memory_add_physaddr_to_nid to fix cxl build error asm-generic: Remove empty #ifdef SA_RESTORER parisc: Use the generic IO helpers parisc: Remove 64bit access on 32bit machines sparc: Fix the generic IO helpers alpha: Use generic <asm-generic/io.h>
This commit is contained in:
Linus Torvalds
commit
93ed07a23f
20 changed files with 341 additions and 162 deletions
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@ -384,7 +384,7 @@ struct el_apecs_procdata
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} \
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} while (0)
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__EXTERN_INLINE unsigned int apecs_ioread8(const void __iomem *xaddr)
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__EXTERN_INLINE u8 apecs_ioread8(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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unsigned long result, base_and_type;
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@ -420,7 +420,7 @@ __EXTERN_INLINE void apecs_iowrite8(u8 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + base_and_type) = w;
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}
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__EXTERN_INLINE unsigned int apecs_ioread16(const void __iomem *xaddr)
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__EXTERN_INLINE u16 apecs_ioread16(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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unsigned long result, base_and_type;
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@ -456,7 +456,7 @@ __EXTERN_INLINE void apecs_iowrite16(u16 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + base_and_type) = w;
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}
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__EXTERN_INLINE unsigned int apecs_ioread32(const void __iomem *xaddr)
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__EXTERN_INLINE u32 apecs_ioread32(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < APECS_DENSE_MEM)
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@ -472,6 +472,22 @@ __EXTERN_INLINE void apecs_iowrite32(u32 b, void __iomem *xaddr)
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*(vuip)addr = b;
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}
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__EXTERN_INLINE u64 apecs_ioread64(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < APECS_DENSE_MEM)
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addr = ((addr - APECS_IO) << 5) + APECS_IO + 0x18;
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return *(vulp)addr;
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}
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__EXTERN_INLINE void apecs_iowrite64(u64 b, void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < APECS_DENSE_MEM)
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addr = ((addr - APECS_IO) << 5) + APECS_IO + 0x18;
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*(vulp)addr = b;
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}
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__EXTERN_INLINE void __iomem *apecs_ioportmap(unsigned long addr)
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{
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return (void __iomem *)(addr + APECS_IO);
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@ -342,7 +342,7 @@ struct el_CIA_sysdata_mcheck {
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#define vuip volatile unsigned int __force *
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#define vulp volatile unsigned long __force *
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__EXTERN_INLINE unsigned int cia_ioread8(const void __iomem *xaddr)
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__EXTERN_INLINE u8 cia_ioread8(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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unsigned long result, base_and_type;
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@ -374,7 +374,7 @@ __EXTERN_INLINE void cia_iowrite8(u8 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + base_and_type) = w;
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}
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__EXTERN_INLINE unsigned int cia_ioread16(const void __iomem *xaddr)
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__EXTERN_INLINE u16 cia_ioread16(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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unsigned long result, base_and_type;
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@ -404,7 +404,7 @@ __EXTERN_INLINE void cia_iowrite16(u16 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + base_and_type) = w;
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}
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__EXTERN_INLINE unsigned int cia_ioread32(const void __iomem *xaddr)
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__EXTERN_INLINE u32 cia_ioread32(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < CIA_DENSE_MEM)
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@ -420,6 +420,22 @@ __EXTERN_INLINE void cia_iowrite32(u32 b, void __iomem *xaddr)
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*(vuip)addr = b;
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}
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__EXTERN_INLINE u64 cia_ioread64(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < CIA_DENSE_MEM)
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addr = ((addr - CIA_IO) << 5) + CIA_IO + 0x18;
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return *(vulp)addr;
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}
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__EXTERN_INLINE void cia_iowrite64(u64 b, void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < CIA_DENSE_MEM)
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addr = ((addr - CIA_IO) << 5) + CIA_IO + 0x18;
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*(vulp)addr = b;
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}
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__EXTERN_INLINE void __iomem *cia_ioportmap(unsigned long addr)
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{
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return (void __iomem *)(addr + CIA_IO);
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@ -230,7 +230,7 @@ union el_lca {
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} while (0)
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__EXTERN_INLINE unsigned int lca_ioread8(const void __iomem *xaddr)
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__EXTERN_INLINE u8 lca_ioread8(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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unsigned long result, base_and_type;
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@ -266,7 +266,7 @@ __EXTERN_INLINE void lca_iowrite8(u8 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + base_and_type) = w;
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}
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__EXTERN_INLINE unsigned int lca_ioread16(const void __iomem *xaddr)
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__EXTERN_INLINE u16 lca_ioread16(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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unsigned long result, base_and_type;
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@ -302,7 +302,7 @@ __EXTERN_INLINE void lca_iowrite16(u16 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + base_and_type) = w;
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}
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__EXTERN_INLINE unsigned int lca_ioread32(const void __iomem *xaddr)
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__EXTERN_INLINE u32 lca_ioread32(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < LCA_DENSE_MEM)
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@ -318,6 +318,22 @@ __EXTERN_INLINE void lca_iowrite32(u32 b, void __iomem *xaddr)
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*(vuip)addr = b;
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}
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__EXTERN_INLINE u64 lca_ioread64(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < LCA_DENSE_MEM)
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addr = ((addr - LCA_IO) << 5) + LCA_IO + 0x18;
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return *(vulp)addr;
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}
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__EXTERN_INLINE void lca_iowrite64(u64 b, void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long) xaddr;
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if (addr < LCA_DENSE_MEM)
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addr = ((addr - LCA_IO) << 5) + LCA_IO + 0x18;
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*(vulp)addr = b;
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}
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__EXTERN_INLINE void __iomem *lca_ioportmap(unsigned long addr)
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{
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return (void __iomem *)(addr + LCA_IO);
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@ -332,10 +332,10 @@ struct io7 {
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#define vucp volatile unsigned char __force *
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#define vusp volatile unsigned short __force *
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extern unsigned int marvel_ioread8(const void __iomem *);
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extern u8 marvel_ioread8(const void __iomem *);
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extern void marvel_iowrite8(u8 b, void __iomem *);
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__EXTERN_INLINE unsigned int marvel_ioread16(const void __iomem *addr)
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__EXTERN_INLINE u16 marvel_ioread16(const void __iomem *addr)
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{
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return __kernel_ldwu(*(vusp)addr);
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}
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@ -248,6 +248,7 @@ struct el_MCPCIA_uncorrected_frame_mcheck {
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#define vip volatile int __force *
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#define vuip volatile unsigned int __force *
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#define vulp volatile unsigned long __force *
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#ifndef MCPCIA_ONE_HAE_WINDOW
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#define MCPCIA_FROB_MMIO \
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@ -267,7 +268,7 @@ extern inline int __mcpcia_is_mmio(unsigned long addr)
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return (addr & 0x80000000UL) == 0;
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}
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__EXTERN_INLINE unsigned int mcpcia_ioread8(const void __iomem *xaddr)
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__EXTERN_INLINE u8 mcpcia_ioread8(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long)xaddr & MCPCIA_MEM_MASK;
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unsigned long hose = (unsigned long)xaddr & ~MCPCIA_MEM_MASK;
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@ -291,7 +292,7 @@ __EXTERN_INLINE void mcpcia_iowrite8(u8 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + hose + 0x00) = w;
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}
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__EXTERN_INLINE unsigned int mcpcia_ioread16(const void __iomem *xaddr)
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__EXTERN_INLINE u16 mcpcia_ioread16(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long)xaddr & MCPCIA_MEM_MASK;
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unsigned long hose = (unsigned long)xaddr & ~MCPCIA_MEM_MASK;
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@ -315,7 +316,7 @@ __EXTERN_INLINE void mcpcia_iowrite16(u16 b, void __iomem *xaddr)
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*(vuip) ((addr << 5) + hose + 0x08) = w;
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}
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__EXTERN_INLINE unsigned int mcpcia_ioread32(const void __iomem *xaddr)
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__EXTERN_INLINE u32 mcpcia_ioread32(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long)xaddr;
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@ -335,6 +336,26 @@ __EXTERN_INLINE void mcpcia_iowrite32(u32 b, void __iomem *xaddr)
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*(vuip)addr = b;
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}
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__EXTERN_INLINE u64 mcpcia_ioread64(const void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long)xaddr;
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if (!__mcpcia_is_mmio(addr))
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addr = ((addr & 0xffff) << 5) + (addr & ~0xfffful) + 0x18;
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return *(vulp)addr;
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}
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__EXTERN_INLINE void mcpcia_iowrite64(u64 b, void __iomem *xaddr)
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{
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unsigned long addr = (unsigned long)xaddr;
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if (!__mcpcia_is_mmio(addr))
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addr = ((addr & 0xffff) << 5) + (addr & ~0xfffful) + 0x18;
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*(vulp)addr = b;
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}
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__EXTERN_INLINE void __iomem *mcpcia_ioportmap(unsigned long addr)
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{
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@ -362,6 +383,7 @@ __EXTERN_INLINE int mcpcia_is_mmio(const volatile void __iomem *xaddr)
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#undef vip
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#undef vuip
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#undef vulp
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#undef __IO_PREFIX
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#define __IO_PREFIX mcpcia
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@ -360,6 +360,7 @@ struct el_t2_frame_corrected {
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#define vip volatile int *
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#define vuip volatile unsigned int *
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#define vulp volatile unsigned long *
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extern inline u8 t2_inb(unsigned long addr)
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{
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@ -402,6 +403,17 @@ extern inline void t2_outl(u32 b, unsigned long addr)
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mb();
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}
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extern inline u64 t2_inq(unsigned long addr)
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{
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return *(vulp) ((addr << 5) + T2_IO + 0x18);
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}
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extern inline void t2_outq(u64 b, unsigned long addr)
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{
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*(vulp) ((addr << 5) + T2_IO + 0x18) = b;
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mb();
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}
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/*
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* Memory functions.
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@ -572,7 +584,7 @@ __EXTERN_INLINE int t2_is_mmio(const volatile void __iomem *addr)
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it doesn't make sense to merge the pio and mmio routines. */
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#define IOPORT(OS, NS) \
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__EXTERN_INLINE unsigned int t2_ioread##NS(const void __iomem *xaddr) \
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__EXTERN_INLINE u##NS t2_ioread##NS(const void __iomem *xaddr) \
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{ \
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if (t2_is_mmio(xaddr)) \
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return t2_read##OS(xaddr); \
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@ -590,11 +602,13 @@ __EXTERN_INLINE void t2_iowrite##NS(u##NS b, void __iomem *xaddr) \
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IOPORT(b, 8)
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IOPORT(w, 16)
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IOPORT(l, 32)
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IOPORT(q, 64)
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#undef IOPORT
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#undef vip
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#undef vuip
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#undef vulp
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#undef __IO_PREFIX
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#define __IO_PREFIX t2
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@ -90,6 +90,8 @@ static inline void * phys_to_virt(unsigned long address)
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}
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#endif
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#define virt_to_phys virt_to_phys
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#define phys_to_virt phys_to_virt
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#define page_to_phys(page) page_to_pa(page)
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/* Maximum PIO space address supported? */
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@ -153,6 +155,7 @@ static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr) \
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REMAP1(unsigned int, ioread8, const)
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REMAP1(unsigned int, ioread16, const)
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REMAP1(unsigned int, ioread32, const)
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REMAP1(u64, ioread64, const)
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REMAP1(u8, readb, const volatile)
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REMAP1(u16, readw, const volatile)
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REMAP1(u32, readl, const volatile)
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@ -161,6 +164,7 @@ REMAP1(u64, readq, const volatile)
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REMAP2(u8, iowrite8, /**/)
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REMAP2(u16, iowrite16, /**/)
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REMAP2(u32, iowrite32, /**/)
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REMAP2(u64, iowrite64, /**/)
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REMAP2(u8, writeb, volatile)
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REMAP2(u16, writew, volatile)
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REMAP2(u32, writel, volatile)
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@ -242,6 +246,12 @@ extern u32 inl(unsigned long port);
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extern void outb(u8 b, unsigned long port);
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extern void outw(u16 b, unsigned long port);
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extern void outl(u32 b, unsigned long port);
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#define inb inb
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#define inw inw
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#define inl inl
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#define outb outb
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#define outw outw
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#define outl outl
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extern u8 readb(const volatile void __iomem *addr);
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extern u16 readw(const volatile void __iomem *addr);
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@ -251,6 +261,14 @@ extern void writeb(u8 b, volatile void __iomem *addr);
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extern void writew(u16 b, volatile void __iomem *addr);
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extern void writel(u32 b, volatile void __iomem *addr);
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extern void writeq(u64 b, volatile void __iomem *addr);
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#define readb readb
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#define readw readw
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#define readl readl
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#define readq readq
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#define writeb writeb
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#define writew writew
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#define writel writel
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#define writeq writeq
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extern u8 __raw_readb(const volatile void __iomem *addr);
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extern u16 __raw_readw(const volatile void __iomem *addr);
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@ -260,6 +278,14 @@ extern void __raw_writeb(u8 b, volatile void __iomem *addr);
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extern void __raw_writew(u16 b, volatile void __iomem *addr);
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extern void __raw_writel(u32 b, volatile void __iomem *addr);
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extern void __raw_writeq(u64 b, volatile void __iomem *addr);
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#define __raw_readb __raw_readb
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#define __raw_readw __raw_readw
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#define __raw_readl __raw_readl
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#define __raw_readq __raw_readq
|
||||
#define __raw_writeb __raw_writeb
|
||||
#define __raw_writew __raw_writew
|
||||
#define __raw_writel __raw_writel
|
||||
#define __raw_writeq __raw_writeq
|
||||
|
||||
/*
|
||||
* Mapping from port numbers to __iomem space is pretty easy.
|
||||
|
|
@ -277,6 +303,9 @@ extern inline void ioport_unmap(void __iomem *addr)
|
|||
{
|
||||
}
|
||||
|
||||
#define ioport_map ioport_map
|
||||
#define ioport_unmap ioport_unmap
|
||||
|
||||
static inline void __iomem *ioremap(unsigned long port, unsigned long size)
|
||||
{
|
||||
return IO_CONCAT(__IO_PREFIX,ioremap) (port, size);
|
||||
|
|
@ -358,6 +387,11 @@ extern inline void outw(u16 b, unsigned long port)
|
|||
}
|
||||
#endif
|
||||
|
||||
#define ioread8 ioread8
|
||||
#define ioread16 ioread16
|
||||
#define iowrite8 iowrite8
|
||||
#define iowrite16 iowrite16
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
|
||||
extern inline unsigned int ioread32(const void __iomem *addr)
|
||||
{
|
||||
|
|
@ -368,12 +402,27 @@ extern inline unsigned int ioread32(const void __iomem *addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
extern inline u64 ioread64(const void __iomem *addr)
|
||||
{
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread64)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern inline void iowrite32(u32 b, void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
IO_CONCAT(__IO_PREFIX, iowrite32)(b, addr);
|
||||
}
|
||||
|
||||
extern inline void iowrite64(u64 b, void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
IO_CONCAT(__IO_PREFIX, iowrite64)(b, addr);
|
||||
}
|
||||
|
||||
extern inline u32 inl(unsigned long port)
|
||||
{
|
||||
return ioread32(ioport_map(port, 4));
|
||||
|
|
@ -385,6 +434,11 @@ extern inline void outl(u32 b, unsigned long port)
|
|||
}
|
||||
#endif
|
||||
|
||||
#define ioread32 ioread32
|
||||
#define ioread64 ioread64
|
||||
#define iowrite32 iowrite32
|
||||
#define iowrite64 iowrite64
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1
|
||||
extern inline u8 __raw_readb(const volatile void __iomem *addr)
|
||||
{
|
||||
|
|
@ -505,6 +559,10 @@ extern u8 readb_relaxed(const volatile void __iomem *addr);
|
|||
extern u16 readw_relaxed(const volatile void __iomem *addr);
|
||||
extern u32 readl_relaxed(const volatile void __iomem *addr);
|
||||
extern u64 readq_relaxed(const volatile void __iomem *addr);
|
||||
#define readb_relaxed readb_relaxed
|
||||
#define readw_relaxed readw_relaxed
|
||||
#define readl_relaxed readl_relaxed
|
||||
#define readq_relaxed readq_relaxed
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
|
||||
extern inline u8 readb_relaxed(const volatile void __iomem *addr)
|
||||
|
|
@ -557,6 +615,10 @@ static inline void memsetw_io(volatile void __iomem *addr, u16 c, long len)
|
|||
_memset_c_io(addr, 0x0001000100010001UL * c, len);
|
||||
}
|
||||
|
||||
#define memset_io memset_io
|
||||
#define memcpy_fromio memcpy_fromio
|
||||
#define memcpy_toio memcpy_toio
|
||||
|
||||
/*
|
||||
* String versions of in/out ops:
|
||||
*/
|
||||
|
|
@ -567,6 +629,13 @@ extern void outsb (unsigned long port, const void *src, unsigned long count);
|
|||
extern void outsw (unsigned long port, const void *src, unsigned long count);
|
||||
extern void outsl (unsigned long port, const void *src, unsigned long count);
|
||||
|
||||
#define insb insb
|
||||
#define insw insw
|
||||
#define insl insl
|
||||
#define outsb outsb
|
||||
#define outsw outsw
|
||||
#define outsl outsl
|
||||
|
||||
/*
|
||||
* The Alpha Jensen hardware for some rather strange reason puts
|
||||
* the RTC clock at 0x170 instead of 0x70. Probably due to some
|
||||
|
|
@ -586,22 +655,30 @@ extern void outsl (unsigned long port, const void *src, unsigned long count);
|
|||
#endif
|
||||
#define RTC_ALWAYS_BCD 0
|
||||
|
||||
/*
|
||||
* Some mucking forons use if[n]def writeq to check if platform has it.
|
||||
* It's a bloody bad idea and we probably want ARCH_HAS_WRITEQ for them
|
||||
* to play with; for now just use cpp anti-recursion logics and make sure
|
||||
* that damn thing is defined and expands to itself.
|
||||
*/
|
||||
|
||||
#define writeq writeq
|
||||
#define readq readq
|
||||
|
||||
/*
|
||||
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
|
||||
* access
|
||||
*/
|
||||
#define xlate_dev_mem_ptr(p) __va(p)
|
||||
|
||||
/*
|
||||
* These get provided from <asm-generic/iomap.h> since alpha does not
|
||||
* select GENERIC_IOMAP.
|
||||
*/
|
||||
#define ioread64 ioread64
|
||||
#define iowrite64 iowrite64
|
||||
#define ioread64be ioread64be
|
||||
#define iowrite64be iowrite64be
|
||||
#define ioread8_rep ioread8_rep
|
||||
#define ioread16_rep ioread16_rep
|
||||
#define ioread32_rep ioread32_rep
|
||||
#define iowrite8_rep iowrite8_rep
|
||||
#define iowrite16_rep iowrite16_rep
|
||||
#define iowrite32_rep iowrite32_rep
|
||||
#define pci_iounmap pci_iounmap
|
||||
|
||||
#include <asm-generic/io.h>
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __ALPHA_IO_H */
|
||||
|
|
|
|||
|
|
@ -6,13 +6,13 @@
|
|||
/* This file may be included multiple times. */
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
|
||||
__EXTERN_INLINE unsigned int
|
||||
__EXTERN_INLINE u8
|
||||
IO_CONCAT(__IO_PREFIX,ioread8)(const void __iomem *a)
|
||||
{
|
||||
return __kernel_ldbu(*(const volatile u8 __force *)a);
|
||||
}
|
||||
|
||||
__EXTERN_INLINE unsigned int
|
||||
__EXTERN_INLINE u16
|
||||
IO_CONCAT(__IO_PREFIX,ioread16)(const void __iomem *a)
|
||||
{
|
||||
return __kernel_ldwu(*(const volatile u16 __force *)a);
|
||||
|
|
@ -32,7 +32,7 @@ IO_CONCAT(__IO_PREFIX,iowrite16)(u16 b, void __iomem *a)
|
|||
#endif
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
|
||||
__EXTERN_INLINE unsigned int
|
||||
__EXTERN_INLINE u32
|
||||
IO_CONCAT(__IO_PREFIX,ioread32)(const void __iomem *a)
|
||||
{
|
||||
return *(const volatile u32 __force *)a;
|
||||
|
|
@ -43,6 +43,18 @@ IO_CONCAT(__IO_PREFIX,iowrite32)(u32 b, void __iomem *a)
|
|||
{
|
||||
*(volatile u32 __force *)a = b;
|
||||
}
|
||||
|
||||
__EXTERN_INLINE u64
|
||||
IO_CONCAT(__IO_PREFIX,ioread64)(const void __iomem *a)
|
||||
{
|
||||
return *(const volatile u64 __force *)a;
|
||||
}
|
||||
|
||||
__EXTERN_INLINE void
|
||||
IO_CONCAT(__IO_PREFIX,iowrite64)(u64 b, void __iomem *a)
|
||||
{
|
||||
*(volatile u64 __force *)a = b;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1
|
||||
|
|
|
|||
|
|
@ -98,6 +98,7 @@ __EXTERN_INLINE void jensen_set_hae(unsigned long addr)
|
|||
}
|
||||
|
||||
#define vuip volatile unsigned int *
|
||||
#define vulp volatile unsigned long *
|
||||
|
||||
/*
|
||||
* IO functions
|
||||
|
|
@ -183,6 +184,12 @@ __EXTERN_INLINE u32 jensen_inl(unsigned long addr)
|
|||
return *(vuip) ((addr << 7) + EISA_IO + 0x60);
|
||||
}
|
||||
|
||||
__EXTERN_INLINE u64 jensen_inq(unsigned long addr)
|
||||
{
|
||||
jensen_set_hae(0);
|
||||
return *(vulp) ((addr << 7) + EISA_IO + 0x60);
|
||||
}
|
||||
|
||||
__EXTERN_INLINE void jensen_outw(u16 b, unsigned long addr)
|
||||
{
|
||||
jensen_set_hae(0);
|
||||
|
|
@ -197,6 +204,13 @@ __EXTERN_INLINE void jensen_outl(u32 b, unsigned long addr)
|
|||
mb();
|
||||
}
|
||||
|
||||
__EXTERN_INLINE void jensen_outq(u64 b, unsigned long addr)
|
||||
{
|
||||
jensen_set_hae(0);
|
||||
*(vulp) ((addr << 7) + EISA_IO + 0x60) = b;
|
||||
mb();
|
||||
}
|
||||
|
||||
/*
|
||||
* Memory functions.
|
||||
*/
|
||||
|
|
@ -305,7 +319,7 @@ __EXTERN_INLINE int jensen_is_mmio(const volatile void __iomem *addr)
|
|||
that it doesn't make sense to merge them. */
|
||||
|
||||
#define IOPORT(OS, NS) \
|
||||
__EXTERN_INLINE unsigned int jensen_ioread##NS(const void __iomem *xaddr) \
|
||||
__EXTERN_INLINE u##NS jensen_ioread##NS(const void __iomem *xaddr) \
|
||||
{ \
|
||||
if (jensen_is_mmio(xaddr)) \
|
||||
return jensen_read##OS(xaddr - 0x100000000ul); \
|
||||
|
|
@ -323,10 +337,12 @@ __EXTERN_INLINE void jensen_iowrite##NS(u##NS b, void __iomem *xaddr) \
|
|||
IOPORT(b, 8)
|
||||
IOPORT(w, 16)
|
||||
IOPORT(l, 32)
|
||||
IOPORT(q, 64)
|
||||
|
||||
#undef IOPORT
|
||||
|
||||
#undef vuip
|
||||
#undef vulp
|
||||
|
||||
#undef __IO_PREFIX
|
||||
#define __IO_PREFIX jensen
|
||||
|
|
|
|||
|
|
@ -46,13 +46,15 @@ struct alpha_machine_vector
|
|||
void (*mv_pci_tbi)(struct pci_controller *hose,
|
||||
dma_addr_t start, dma_addr_t end);
|
||||
|
||||
unsigned int (*mv_ioread8)(const void __iomem *);
|
||||
unsigned int (*mv_ioread16)(const void __iomem *);
|
||||
unsigned int (*mv_ioread32)(const void __iomem *);
|
||||
u8 (*mv_ioread8)(const void __iomem *);
|
||||
u16 (*mv_ioread16)(const void __iomem *);
|
||||
u32 (*mv_ioread32)(const void __iomem *);
|
||||
u64 (*mv_ioread64)(const void __iomem *);
|
||||
|
||||
void (*mv_iowrite8)(u8, void __iomem *);
|
||||
void (*mv_iowrite16)(u16, void __iomem *);
|
||||
void (*mv_iowrite32)(u32, void __iomem *);
|
||||
void (*mv_iowrite64)(u64, void __iomem *);
|
||||
|
||||
u8 (*mv_readb)(const volatile void __iomem *);
|
||||
u16 (*mv_readw)(const volatile void __iomem *);
|
||||
|
|
|
|||
|
|
@ -803,7 +803,7 @@ void __iomem *marvel_ioportmap (unsigned long addr)
|
|||
return (void __iomem *)addr;
|
||||
}
|
||||
|
||||
unsigned int
|
||||
unsigned u8
|
||||
marvel_ioread8(const void __iomem *xaddr)
|
||||
{
|
||||
unsigned long addr = (unsigned long) xaddr;
|
||||
|
|
|
|||
|
|
@ -41,6 +41,15 @@ unsigned int ioread32(const void __iomem *addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
u64 ioread64(const void __iomem *addr)
|
||||
{
|
||||
unsigned int ret;
|
||||
mb();
|
||||
ret = IO_CONCAT(__IO_PREFIX,ioread64)(addr);
|
||||
mb();
|
||||
return ret;
|
||||
}
|
||||
|
||||
void iowrite8(u8 b, void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
|
|
@ -59,12 +68,20 @@ void iowrite32(u32 b, void __iomem *addr)
|
|||
IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
|
||||
}
|
||||
|
||||
void iowrite64(u64 b, void __iomem *addr)
|
||||
{
|
||||
mb();
|
||||
IO_CONCAT(__IO_PREFIX,iowrite64)(b, addr);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(ioread8);
|
||||
EXPORT_SYMBOL(ioread16);
|
||||
EXPORT_SYMBOL(ioread32);
|
||||
EXPORT_SYMBOL(ioread64);
|
||||
EXPORT_SYMBOL(iowrite8);
|
||||
EXPORT_SYMBOL(iowrite16);
|
||||
EXPORT_SYMBOL(iowrite32);
|
||||
EXPORT_SYMBOL(iowrite64);
|
||||
|
||||
u8 inb(unsigned long port)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -78,9 +78,11 @@
|
|||
.mv_ioread8 = CAT(low,_ioread8), \
|
||||
.mv_ioread16 = CAT(low,_ioread16), \
|
||||
.mv_ioread32 = CAT(low,_ioread32), \
|
||||
.mv_ioread64 = CAT(low,_ioread64), \
|
||||
.mv_iowrite8 = CAT(low,_iowrite8), \
|
||||
.mv_iowrite16 = CAT(low,_iowrite16), \
|
||||
.mv_iowrite32 = CAT(low,_iowrite32), \
|
||||
.mv_iowrite64 = CAT(low,_iowrite64), \
|
||||
.mv_readb = CAT(low,_readb), \
|
||||
.mv_readw = CAT(low,_readw), \
|
||||
.mv_readl = CAT(low,_readl), \
|
||||
|
|
|
|||
|
|
@ -75,5 +75,6 @@ int memory_add_physaddr_to_nid(u64 addr)
|
|||
return 0;
|
||||
return nid;
|
||||
}
|
||||
EXPORT_SYMBOL(memory_add_physaddr_to_nid);
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -128,98 +128,16 @@ static inline void gsc_writeq(unsigned long long val, unsigned long addr)
|
|||
void __iomem *ioremap(unsigned long offset, unsigned long size);
|
||||
#define ioremap_wc ioremap
|
||||
#define ioremap_uc ioremap
|
||||
#define pci_iounmap pci_iounmap
|
||||
|
||||
extern void iounmap(const volatile void __iomem *addr);
|
||||
|
||||
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
|
||||
{
|
||||
return (*(volatile unsigned char __force *) (addr));
|
||||
}
|
||||
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(volatile unsigned short __force *) addr;
|
||||
}
|
||||
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(volatile unsigned int __force *) addr;
|
||||
}
|
||||
static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
|
||||
{
|
||||
return *(volatile unsigned long long __force *) addr;
|
||||
}
|
||||
|
||||
static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
|
||||
{
|
||||
*(volatile unsigned char __force *) addr = b;
|
||||
}
|
||||
static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
|
||||
{
|
||||
*(volatile unsigned short __force *) addr = b;
|
||||
}
|
||||
static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
|
||||
{
|
||||
*(volatile unsigned int __force *) addr = b;
|
||||
}
|
||||
static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
|
||||
{
|
||||
*(volatile unsigned long long __force *) addr = b;
|
||||
}
|
||||
|
||||
static inline unsigned char readb(const volatile void __iomem *addr)
|
||||
{
|
||||
return __raw_readb(addr);
|
||||
}
|
||||
static inline unsigned short readw(const volatile void __iomem *addr)
|
||||
{
|
||||
return le16_to_cpu((__le16 __force) __raw_readw(addr));
|
||||
}
|
||||
static inline unsigned int readl(const volatile void __iomem *addr)
|
||||
{
|
||||
return le32_to_cpu((__le32 __force) __raw_readl(addr));
|
||||
}
|
||||
static inline unsigned long long readq(const volatile void __iomem *addr)
|
||||
{
|
||||
return le64_to_cpu((__le64 __force) __raw_readq(addr));
|
||||
}
|
||||
|
||||
static inline void writeb(unsigned char b, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeb(b, addr);
|
||||
}
|
||||
static inline void writew(unsigned short w, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writew((__u16 __force) cpu_to_le16(w), addr);
|
||||
}
|
||||
static inline void writel(unsigned int l, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writel((__u32 __force) cpu_to_le32(l), addr);
|
||||
}
|
||||
static inline void writeq(unsigned long long q, volatile void __iomem *addr)
|
||||
{
|
||||
__raw_writeq((__u64 __force) cpu_to_le64(q), addr);
|
||||
}
|
||||
|
||||
#define readb readb
|
||||
#define readw readw
|
||||
#define readl readl
|
||||
#define readq readq
|
||||
#define writeb writeb
|
||||
#define writew writew
|
||||
#define writel writel
|
||||
#define writeq writeq
|
||||
|
||||
#define readb_relaxed(addr) readb(addr)
|
||||
#define readw_relaxed(addr) readw(addr)
|
||||
#define readl_relaxed(addr) readl(addr)
|
||||
#define readq_relaxed(addr) readq(addr)
|
||||
#define writeb_relaxed(b, addr) writeb(b, addr)
|
||||
#define writew_relaxed(w, addr) writew(w, addr)
|
||||
#define writel_relaxed(l, addr) writel(l, addr)
|
||||
#define writeq_relaxed(q, addr) writeq(q, addr)
|
||||
|
||||
void memset_io(volatile void __iomem *addr, unsigned char val, int count);
|
||||
void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
|
||||
void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
|
||||
#define memset_io memset_io
|
||||
#define memcpy_fromio memcpy_fromio
|
||||
#define memcpy_toio memcpy_toio
|
||||
|
||||
/* Port-space IO */
|
||||
|
||||
|
|
@ -241,10 +159,15 @@ extern void eisa_out32(unsigned int data, unsigned short port);
|
|||
extern unsigned char inb(int addr);
|
||||
extern unsigned short inw(int addr);
|
||||
extern unsigned int inl(int addr);
|
||||
|
||||
extern void outb(unsigned char b, int addr);
|
||||
extern void outw(unsigned short b, int addr);
|
||||
extern void outl(unsigned int b, int addr);
|
||||
#define inb inb
|
||||
#define inw inw
|
||||
#define inl inl
|
||||
#define outb outb
|
||||
#define outw outw
|
||||
#define outl outl
|
||||
#elif defined(CONFIG_EISA)
|
||||
#define inb eisa_in8
|
||||
#define inw eisa_in16
|
||||
|
|
@ -270,7 +193,9 @@ static inline int inl(unsigned long addr)
|
|||
BUG();
|
||||
return -1;
|
||||
}
|
||||
|
||||
#define inb inb
|
||||
#define inw inw
|
||||
#define inl inl
|
||||
#define outb(x, y) ({(void)(x); (void)(y); BUG(); 0;})
|
||||
#define outw(x, y) ({(void)(x); (void)(y); BUG(); 0;})
|
||||
#define outl(x, y) ({(void)(x); (void)(y); BUG(); 0;})
|
||||
|
|
@ -285,7 +210,12 @@ extern void insl (unsigned long port, void *dst, unsigned long count);
|
|||
extern void outsb (unsigned long port, const void *src, unsigned long count);
|
||||
extern void outsw (unsigned long port, const void *src, unsigned long count);
|
||||
extern void outsl (unsigned long port, const void *src, unsigned long count);
|
||||
|
||||
#define insb insb
|
||||
#define insw insw
|
||||
#define insl insl
|
||||
#define outsb outsb
|
||||
#define outsw outsw
|
||||
#define outsl outsl
|
||||
|
||||
/* IO Port space is : BBiiii where BB is HBA number. */
|
||||
#define IO_SPACE_LIMIT 0x00ffffff
|
||||
|
|
@ -297,6 +227,7 @@ extern void outsl (unsigned long port, const void *src, unsigned long count);
|
|||
* value for either 32 or 64 bit mode */
|
||||
#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
#define ioread64 ioread64
|
||||
#define ioread64be ioread64be
|
||||
#define iowrite64 iowrite64
|
||||
|
|
@ -305,8 +236,31 @@ extern u64 ioread64(const void __iomem *addr);
|
|||
extern u64 ioread64be(const void __iomem *addr);
|
||||
extern void iowrite64(u64 val, void __iomem *addr);
|
||||
extern void iowrite64be(u64 val, void __iomem *addr);
|
||||
#endif
|
||||
|
||||
#include <asm-generic/iomap.h>
|
||||
/*
|
||||
* These get provided from <asm-generic/iomap.h> since parisc does not
|
||||
* select GENERIC_IOMAP.
|
||||
*/
|
||||
#define ioport_map ioport_map
|
||||
#define ioport_unmap ioport_unmap
|
||||
#define ioread8 ioread8
|
||||
#define ioread16 ioread16
|
||||
#define ioread32 ioread32
|
||||
#define ioread16be ioread16be
|
||||
#define ioread32be ioread32be
|
||||
#define iowrite8 iowrite8
|
||||
#define iowrite16 iowrite16
|
||||
#define iowrite32 iowrite32
|
||||
#define iowrite16be iowrite16be
|
||||
#define iowrite32be iowrite32be
|
||||
#define ioread8_rep ioread8_rep
|
||||
#define ioread16_rep ioread16_rep
|
||||
#define ioread32_rep ioread32_rep
|
||||
#define iowrite8_rep iowrite8_rep
|
||||
#define iowrite16_rep iowrite16_rep
|
||||
#define iowrite32_rep iowrite32_rep
|
||||
|
||||
/*
|
||||
* Convert a physical pointer to a virtual kernel pointer for /dev/mem
|
||||
|
|
@ -316,4 +270,6 @@ extern void iowrite64be(u64 val, void __iomem *addr);
|
|||
|
||||
extern int devmem_is_allowed(unsigned long pfn);
|
||||
|
||||
#include <asm-generic/io.h>
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -48,15 +48,19 @@ struct iomap_ops {
|
|||
unsigned int (*read16be)(const void __iomem *);
|
||||
unsigned int (*read32)(const void __iomem *);
|
||||
unsigned int (*read32be)(const void __iomem *);
|
||||
#ifdef CONFIG_64BIT
|
||||
u64 (*read64)(const void __iomem *);
|
||||
u64 (*read64be)(const void __iomem *);
|
||||
#endif
|
||||
void (*write8)(u8, void __iomem *);
|
||||
void (*write16)(u16, void __iomem *);
|
||||
void (*write16be)(u16, void __iomem *);
|
||||
void (*write32)(u32, void __iomem *);
|
||||
void (*write32be)(u32, void __iomem *);
|
||||
#ifdef CONFIG_64BIT
|
||||
void (*write64)(u64, void __iomem *);
|
||||
void (*write64be)(u64, void __iomem *);
|
||||
#endif
|
||||
void (*read8r)(const void __iomem *, void *, unsigned long);
|
||||
void (*read16r)(const void __iomem *, void *, unsigned long);
|
||||
void (*read32r)(const void __iomem *, void *, unsigned long);
|
||||
|
|
@ -175,6 +179,7 @@ static unsigned int iomem_read32be(const void __iomem *addr)
|
|||
return __raw_readl(addr);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
static u64 iomem_read64(const void __iomem *addr)
|
||||
{
|
||||
return readq(addr);
|
||||
|
|
@ -184,6 +189,7 @@ static u64 iomem_read64be(const void __iomem *addr)
|
|||
{
|
||||
return __raw_readq(addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void iomem_write8(u8 datum, void __iomem *addr)
|
||||
{
|
||||
|
|
@ -210,15 +216,17 @@ static void iomem_write32be(u32 datum, void __iomem *addr)
|
|||
__raw_writel(datum, addr);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
static void iomem_write64(u64 datum, void __iomem *addr)
|
||||
{
|
||||
writel(datum, addr);
|
||||
writeq(datum, addr);
|
||||
}
|
||||
|
||||
static void iomem_write64be(u64 datum, void __iomem *addr)
|
||||
{
|
||||
__raw_writel(datum, addr);
|
||||
__raw_writeq(datum, addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void iomem_read8r(const void __iomem *addr, void *dst, unsigned long count)
|
||||
{
|
||||
|
|
@ -274,15 +282,19 @@ static const struct iomap_ops iomem_ops = {
|
|||
.read16be = iomem_read16be,
|
||||
.read32 = iomem_read32,
|
||||
.read32be = iomem_read32be,
|
||||
#ifdef CONFIG_64BIT
|
||||
.read64 = iomem_read64,
|
||||
.read64be = iomem_read64be,
|
||||
#endif
|
||||
.write8 = iomem_write8,
|
||||
.write16 = iomem_write16,
|
||||
.write16be = iomem_write16be,
|
||||
.write32 = iomem_write32,
|
||||
.write32be = iomem_write32be,
|
||||
#ifdef CONFIG_64BIT
|
||||
.write64 = iomem_write64,
|
||||
.write64be = iomem_write64be,
|
||||
#endif
|
||||
.read8r = iomem_read8r,
|
||||
.read16r = iomem_read16r,
|
||||
.read32r = iomem_read32r,
|
||||
|
|
@ -332,6 +344,7 @@ unsigned int ioread32be(const void __iomem *addr)
|
|||
return *((u32 *)addr);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
u64 ioread64(const void __iomem *addr)
|
||||
{
|
||||
if (unlikely(INDIRECT_ADDR(addr)))
|
||||
|
|
@ -345,26 +358,7 @@ u64 ioread64be(const void __iomem *addr)
|
|||
return iomap_ops[ADDR_TO_REGION(addr)]->read64be(addr);
|
||||
return *((u64 *)addr);
|
||||
}
|
||||
|
||||
u64 ioread64_lo_hi(const void __iomem *addr)
|
||||
{
|
||||
u32 low, high;
|
||||
|
||||
low = ioread32(addr);
|
||||
high = ioread32(addr + sizeof(u32));
|
||||
|
||||
return low + ((u64)high << 32);
|
||||
}
|
||||
|
||||
u64 ioread64_hi_lo(const void __iomem *addr)
|
||||
{
|
||||
u32 low, high;
|
||||
|
||||
high = ioread32(addr + sizeof(u32));
|
||||
low = ioread32(addr);
|
||||
|
||||
return low + ((u64)high << 32);
|
||||
}
|
||||
#endif
|
||||
|
||||
void iowrite8(u8 datum, void __iomem *addr)
|
||||
{
|
||||
|
|
@ -411,6 +405,7 @@ void iowrite32be(u32 datum, void __iomem *addr)
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
void iowrite64(u64 datum, void __iomem *addr)
|
||||
{
|
||||
if (unlikely(INDIRECT_ADDR(addr))) {
|
||||
|
|
@ -428,18 +423,7 @@ void iowrite64be(u64 datum, void __iomem *addr)
|
|||
*((u64 *)addr) = datum;
|
||||
}
|
||||
}
|
||||
|
||||
void iowrite64_lo_hi(u64 val, void __iomem *addr)
|
||||
{
|
||||
iowrite32(val, addr);
|
||||
iowrite32(val >> 32, addr + sizeof(u32));
|
||||
}
|
||||
|
||||
void iowrite64_hi_lo(u64 val, void __iomem *addr)
|
||||
{
|
||||
iowrite32(val >> 32, addr + sizeof(u32));
|
||||
iowrite32(val, addr);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Repeating interfaces */
|
||||
|
||||
|
|
@ -544,19 +528,19 @@ EXPORT_SYMBOL(ioread16);
|
|||
EXPORT_SYMBOL(ioread16be);
|
||||
EXPORT_SYMBOL(ioread32);
|
||||
EXPORT_SYMBOL(ioread32be);
|
||||
#ifdef CONFIG_64BIT
|
||||
EXPORT_SYMBOL(ioread64);
|
||||
EXPORT_SYMBOL(ioread64be);
|
||||
EXPORT_SYMBOL(ioread64_lo_hi);
|
||||
EXPORT_SYMBOL(ioread64_hi_lo);
|
||||
#endif
|
||||
EXPORT_SYMBOL(iowrite8);
|
||||
EXPORT_SYMBOL(iowrite16);
|
||||
EXPORT_SYMBOL(iowrite16be);
|
||||
EXPORT_SYMBOL(iowrite32);
|
||||
EXPORT_SYMBOL(iowrite32be);
|
||||
#ifdef CONFIG_64BIT
|
||||
EXPORT_SYMBOL(iowrite64);
|
||||
EXPORT_SYMBOL(iowrite64be);
|
||||
EXPORT_SYMBOL(iowrite64_lo_hi);
|
||||
EXPORT_SYMBOL(iowrite64_hi_lo);
|
||||
#endif
|
||||
EXPORT_SYMBOL(ioread8_rep);
|
||||
EXPORT_SYMBOL(ioread16_rep);
|
||||
EXPORT_SYMBOL(ioread32_rep);
|
||||
|
|
|
|||
|
|
@ -19,4 +19,6 @@
|
|||
#define writel_be(__w, __addr) __raw_writel(__w, __addr)
|
||||
#define writew_be(__l, __addr) __raw_writew(__l, __addr)
|
||||
|
||||
#include <asm-generic/io.h>
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
#include <asm/page.h> /* IO address mapping routines need this */
|
||||
#include <asm/asi.h>
|
||||
#include <asm-generic/pci_iomap.h>
|
||||
#define pci_iomap pci_iomap
|
||||
|
||||
/* BIO layer definitions. */
|
||||
extern unsigned long kern_base, kern_size;
|
||||
|
|
@ -239,38 +240,51 @@ static inline void outl(u32 l, unsigned long addr)
|
|||
void outsb(unsigned long, const void *, unsigned long);
|
||||
void outsw(unsigned long, const void *, unsigned long);
|
||||
void outsl(unsigned long, const void *, unsigned long);
|
||||
#define outsb outsb
|
||||
#define outsw outsw
|
||||
#define outsl outsl
|
||||
void insb(unsigned long, void *, unsigned long);
|
||||
void insw(unsigned long, void *, unsigned long);
|
||||
void insl(unsigned long, void *, unsigned long);
|
||||
#define insb insb
|
||||
#define insw insw
|
||||
#define insl insl
|
||||
|
||||
static inline void readsb(void __iomem *port, void *buf, unsigned long count)
|
||||
{
|
||||
insb((unsigned long __force)port, buf, count);
|
||||
}
|
||||
#define readsb readsb
|
||||
|
||||
static inline void readsw(void __iomem *port, void *buf, unsigned long count)
|
||||
{
|
||||
insw((unsigned long __force)port, buf, count);
|
||||
}
|
||||
#define readsw readsw
|
||||
|
||||
static inline void readsl(void __iomem *port, void *buf, unsigned long count)
|
||||
{
|
||||
insl((unsigned long __force)port, buf, count);
|
||||
}
|
||||
#define readsl readsl
|
||||
|
||||
static inline void writesb(void __iomem *port, const void *buf, unsigned long count)
|
||||
{
|
||||
outsb((unsigned long __force)port, buf, count);
|
||||
}
|
||||
#define writesb writesb
|
||||
|
||||
static inline void writesw(void __iomem *port, const void *buf, unsigned long count)
|
||||
{
|
||||
outsw((unsigned long __force)port, buf, count);
|
||||
}
|
||||
#define writesw writesw
|
||||
|
||||
static inline void writesl(void __iomem *port, const void *buf, unsigned long count)
|
||||
{
|
||||
outsl((unsigned long __force)port, buf, count);
|
||||
}
|
||||
#define writesl writesl
|
||||
|
||||
#define ioread8_rep(p,d,l) readsb(p,d,l)
|
||||
#define ioread16_rep(p,d,l) readsw(p,d,l)
|
||||
|
|
@ -344,6 +358,7 @@ static inline void memset_io(volatile void __iomem *dst, int c, __kernel_size_t
|
|||
d++;
|
||||
}
|
||||
}
|
||||
#define memset_io memset_io
|
||||
|
||||
static inline void sbus_memcpy_fromio(void *dst, const volatile void __iomem *src,
|
||||
__kernel_size_t n)
|
||||
|
|
@ -369,6 +384,7 @@ static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
|
|||
src++;
|
||||
}
|
||||
}
|
||||
#define memcpy_fromio memcpy_fromio
|
||||
|
||||
static inline void sbus_memcpy_toio(volatile void __iomem *dst, const void *src,
|
||||
__kernel_size_t n)
|
||||
|
|
@ -395,6 +411,7 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
|
|||
d++;
|
||||
}
|
||||
}
|
||||
#define memcpy_toio memcpy_toio
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
|
|
@ -412,7 +429,9 @@ static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
|
|||
static inline void __iomem *ioremap_np(unsigned long offset, unsigned long size)
|
||||
{
|
||||
return NULL;
|
||||
|
||||
}
|
||||
#define ioremap_np ioremap_np
|
||||
|
||||
static inline void iounmap(volatile void __iomem *addr)
|
||||
{
|
||||
|
|
@ -432,10 +451,13 @@ static inline void iounmap(volatile void __iomem *addr)
|
|||
/* Create a virtual mapping cookie for an IO port range */
|
||||
void __iomem *ioport_map(unsigned long port, unsigned int nr);
|
||||
void ioport_unmap(void __iomem *);
|
||||
#define ioport_map ioport_map
|
||||
#define ioport_unmap ioport_unmap
|
||||
|
||||
/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
|
||||
struct pci_dev;
|
||||
void pci_iounmap(struct pci_dev *dev, void __iomem *);
|
||||
#define pci_iounmap pci_iounmap
|
||||
|
||||
static inline int sbus_can_dma_64bit(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -28,6 +28,12 @@
|
|||
#include <linux/dma-map-ops.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/iommu-helper.h>
|
||||
/*
|
||||
* The semantics of 64 register access on 32bit systems can't be guaranteed
|
||||
* by the C standard, we hope the _lo_hi() macros defining readq and writeq
|
||||
* here will behave as expected.
|
||||
*/
|
||||
#include <linux/io-64-nonatomic-lo-hi.h>
|
||||
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/io.h>
|
||||
|
|
|
|||
|
|
@ -5,8 +5,6 @@
|
|||
#include <uapi/asm-generic/signal.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef SA_RESTORER
|
||||
#endif
|
||||
|
||||
#include <asm/sigcontext.h>
|
||||
#undef __HAVE_ARCH_SIG_BITOPS
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue