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drm/i915/display: Fix the encoder type check

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For all ddi, encoder->type holds output type as ddi,
assigning it to individual o/p types is no more valid.

Fixes: 362bfb995b ("drm/i915/tgl: Add DKL PHY vswing table for HDMI")

v2: Rebase, no functional change.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200612082237.11886-1-vandita.kulkarni@intel.com
This commit is contained in:
Vandita Kulkarni 2020-06-12 13:52:37 +05:30 • committed by Uma Shankar
parent 2bcefd0d26
commit 94641eb6c6
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/i915/display/intel_ddi.c
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@ -2615,7 +2615,7 @@ static void icl_ddi_vswing_sequence(struct intel_encoder *encoder,
static void static void
tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int link_clock, tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int link_clock,
u32 level) u32 level, enum intel_output_type type)
{ {
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port);
@ -2623,7 +2623,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int link_clock,
u32 n_entries, val, ln, dpcnt_mask, dpcnt_val; u32 n_entries, val, ln, dpcnt_mask, dpcnt_val;
int rate = 0; int rate = 0;
if (encoder->type != INTEL_OUTPUT_HDMI) { if (type == INTEL_OUTPUT_HDMI) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
rate = intel_dp->link_rate; rate = intel_dp->link_rate;
@ -2676,7 +2676,7 @@ static void tgl_ddi_vswing_sequence(struct intel_encoder *encoder,
if (intel_phy_is_combo(dev_priv, phy)) if (intel_phy_is_combo(dev_priv, phy))
icl_combo_phy_ddi_vswing_sequence(encoder, level, type); icl_combo_phy_ddi_vswing_sequence(encoder, level, type);
else else
tgl_dkl_phy_ddi_vswing_sequence(encoder, link_clock, level); tgl_dkl_phy_ddi_vswing_sequence(encoder, link_clock, level, type);
} }
static u32 translate_signal_level(struct intel_dp *intel_dp, int signal_levels) static u32 translate_signal_level(struct intel_dp *intel_dp, int signal_levels)