niansa-misc/linux
1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
Code Issues Projects Releases Packages Wiki Activity

drm/amdgpu: correct the vmhub index when page fault occurs

Browse source 
The AMDGPU_GFXHUB was bind to each xcc in the logical order.
Thus convert the node_id to logical xcc_id to index the
correct AMDGPU_GFXHUB. And "node_id / 4" can get the correct
AMDGPU_MMHUB0 index.

Signed-off-by: Le Ma <le.ma@amd.com>
Tested-by: Asad kamal <asad.kamal@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Le Ma 2022-12-09 19:44:05 +08:00 • committed by Alex Deucher
parent 1794e9d7e7
commit 98b2e9cad2
3 changed files with 25 additions and 17 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
View file

@ -280,6 +280,7 @@ struct amdgpu_gfx_funcs {
(*query_mem_partition_mode)(struct amdgpu_device *adev); (*query_mem_partition_mode)(struct amdgpu_device *adev);
int (*switch_partition_mode)(struct amdgpu_device *adev, int (*switch_partition_mode)(struct amdgpu_device *adev,
int num_xccs_per_xcp); int num_xccs_per_xcp);
int (*ih_node_to_logical_xcc)(struct amdgpu_device *adev, int ih_node);
}; };
struct sq_work { struct sq_work {

27
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
View file

@ -637,6 +637,19 @@ static int gfx_v9_4_3_switch_compute_partition(struct amdgpu_device *adev,
return 0; return 0;
} }
static int gfx_v9_4_3_ih_to_xcc_inst(struct amdgpu_device *adev, int ih_node)
{
int xcc;
xcc = hweight8(adev->gfx.xcc_mask & GENMASK(ih_node / 2, 0));
if (!xcc) {
dev_err(adev->dev, "Couldn't find xcc mapping from IH node");
return -EINVAL;
}
return xcc - 1;
}
static const struct amdgpu_gfx_funcs gfx_v9_4_3_gfx_funcs = { static const struct amdgpu_gfx_funcs gfx_v9_4_3_gfx_funcs = {
.get_gpu_clock_counter = &gfx_v9_4_3_get_gpu_clock_counter, .get_gpu_clock_counter = &gfx_v9_4_3_get_gpu_clock_counter,
.select_se_sh = &gfx_v9_4_3_xcc_select_se_sh, .select_se_sh = &gfx_v9_4_3_xcc_select_se_sh,
@ -646,6 +659,7 @@ static const struct amdgpu_gfx_funcs gfx_v9_4_3_gfx_funcs = {
.select_me_pipe_q = &gfx_v9_4_3_select_me_pipe_q, .select_me_pipe_q = &gfx_v9_4_3_select_me_pipe_q,
.switch_partition_mode = &gfx_v9_4_3_switch_compute_partition, .switch_partition_mode = &gfx_v9_4_3_switch_compute_partition,
.query_mem_partition_mode = &gfx_v9_4_3_query_memory_partition, .query_mem_partition_mode = &gfx_v9_4_3_query_memory_partition,
.ih_node_to_logical_xcc = &gfx_v9_4_3_ih_to_xcc_inst,
}; };
static int gfx_v9_4_3_gpu_early_init(struct amdgpu_device *adev) static int gfx_v9_4_3_gpu_early_init(struct amdgpu_device *adev)
@ -2754,19 +2768,6 @@ static int gfx_v9_4_3_set_eop_interrupt_state(struct amdgpu_device *adev,
return 0; return 0;
} }
static int gfx_v9_4_3_ih_to_xcc_inst(struct amdgpu_device *adev, int ih_node)
{
int xcc;
xcc = hweight8(adev->gfx.xcc_mask & GENMASK(ih_node / 2, 0));
if (!xcc) {
dev_err(adev->dev, "Couldn't find xcc mapping from IH node");
return -EINVAL;
}
return xcc - 1;
}
static int gfx_v9_4_3_eop_irq(struct amdgpu_device *adev, static int gfx_v9_4_3_eop_irq(struct amdgpu_device *adev,
struct amdgpu_irq_src *source, struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry) struct amdgpu_iv_entry *entry)

14
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
View file

@ -557,22 +557,28 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev,
u64 addr; u64 addr;
uint32_t cam_index = 0; uint32_t cam_index = 0;
int ret; int ret;
uint32_t node_id; uint32_t node_id, xcc_id = 0;
node_id = (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 3)) ? entry->node_id : 0; node_id = entry->node_id;
addr = (u64)entry->src_data[0] << 12; addr = (u64)entry->src_data[0] << 12;
addr |= ((u64)entry->src_data[1] & 0xf) << 44; addr |= ((u64)entry->src_data[1] & 0xf) << 44;
if (entry->client_id == SOC15_IH_CLIENTID_VMC) { if (entry->client_id == SOC15_IH_CLIENTID_VMC) {
hub_name = "mmhub0"; hub_name = "mmhub0";
hub = &adev->vmhub[AMDGPU_MMHUB0(0)]; hub = &adev->vmhub[AMDGPU_MMHUB0(node_id / 4)];
} else if (entry->client_id == SOC15_IH_CLIENTID_VMC1) { } else if (entry->client_id == SOC15_IH_CLIENTID_VMC1) {
hub_name = "mmhub1"; hub_name = "mmhub1";
hub = &adev->vmhub[AMDGPU_MMHUB1(0)]; hub = &adev->vmhub[AMDGPU_MMHUB1(0)];
} else { } else {
hub_name = "gfxhub0"; hub_name = "gfxhub0";
hub = &adev->vmhub[node_id/2]; if (adev->gfx.funcs->ih_node_to_logical_xcc) {
xcc_id = adev->gfx.funcs->ih_node_to_logical_xcc(adev,
node_id);
if (xcc_id < 0)
xcc_id = 0;
}
hub = &adev->vmhub[xcc_id];
} }
if (retry_fault) { if (retry_fault) {