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drm/amdkfd: Only apply heavy-weight TLB flush on Aldebaran

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It is to workaround HW bug on other Asics and based on
reverting two commits back:
  drm/amdkfd: Add heavy-weight TLB flush after unmapping
  drm/amdkfd: Add memory sync before TLB flush on unmap

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Huang 2021-07-14 14:44:53 -04:00 • committed by Alex Deucher
parent 3cd293a78a
commit a50fe70780
1 changed files with 17 additions and 15 deletions
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6
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
View file

@ -1570,7 +1570,9 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
}
mutex_unlock(&p->mutex);
err = amdgpu_amdkfd_gpuvm_sync_memory(dev->kgd, (struct kgd_mem *) mem, true);
if (dev->device_info->asic_family == CHIP_ALDEBARAN) {
err = amdgpu_amdkfd_gpuvm_sync_memory(dev->kgd,
(struct kgd_mem *) mem, true);
if (err) {
pr_debug("Sync memory failed, wait interrupted by user signal\n");
goto sync_memory_failed;
@ -1586,7 +1588,7 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
continue;
kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT);
}
}
kfree(devices_arr);
return 0;