niansa-misc/linux
1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
Code Issues Projects Releases Packages Wiki Activity

arm64: cpufeature: Reduce number of pointer auth CPU caps from 6 to 4

Browse source 
We can easily avoid defining the two meta-capabilities for the address
and generic keys, so remove them and instead just check both of the
architected and impdef capabilities when determining the level of system
support.

Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Will Deacon 2018-12-12 15:52:02 +00:00
parent fbedc599e9
commit a56005d321
3 changed files with 8 additions and 17 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
arch/arm64/include/asm/cpucaps.h
View file

@ -58,11 +58,9 @@
#define ARM64_WORKAROUND_1165522 37 #define ARM64_WORKAROUND_1165522 37
#define ARM64_HAS_ADDRESS_AUTH_ARCH 38 #define ARM64_HAS_ADDRESS_AUTH_ARCH 38
#define ARM64_HAS_ADDRESS_AUTH_IMP_DEF 39 #define ARM64_HAS_ADDRESS_AUTH_IMP_DEF 39
#define ARM64_HAS_ADDRESS_AUTH 40 #define ARM64_HAS_GENERIC_AUTH_ARCH 40
#define ARM64_HAS_GENERIC_AUTH_ARCH 41 #define ARM64_HAS_GENERIC_AUTH_IMP_DEF 41
#define ARM64_HAS_GENERIC_AUTH_IMP_DEF 42
#define ARM64_HAS_GENERIC_AUTH 43
#define ARM64_NCAPS 44 #define ARM64_NCAPS 42
#endif /* __ASM_CPUCAPS_H */ #endif /* __ASM_CPUCAPS_H */

6
arch/arm64/include/asm/cpufeature.h
View file

@ -568,13 +568,15 @@ static inline bool system_supports_cnp(void)
static inline bool system_supports_address_auth(void) static inline bool system_supports_address_auth(void)
{ {
return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) && return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH); (cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_ARCH) ||
cpus_have_const_cap(ARM64_HAS_ADDRESS_AUTH_IMP_DEF));
} }
static inline bool system_supports_generic_auth(void) static inline bool system_supports_generic_auth(void)
{ {
return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) && return IS_ENABLED(CONFIG_ARM64_PTR_AUTH) &&
cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH); (cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_ARCH) ||
cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH_IMP_DEF));
} }
#define ARM64_SSBD_UNKNOWN -1 #define ARM64_SSBD_UNKNOWN -1

11
arch/arm64/kernel/cpufeature.c
View file

@ -1469,6 +1469,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.field_pos = ID_AA64ISAR1_APA_SHIFT, .field_pos = ID_AA64ISAR1_APA_SHIFT,
.min_field_value = ID_AA64ISAR1_APA_ARCHITECTED, .min_field_value = ID_AA64ISAR1_APA_ARCHITECTED,
.matches = has_cpuid_feature, .matches = has_cpuid_feature,
.cpu_enable = cpu_enable_address_auth,
}, },
{ {
.desc = "Address authentication (IMP DEF algorithm)", .desc = "Address authentication (IMP DEF algorithm)",
@ -1479,11 +1480,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.field_pos = ID_AA64ISAR1_API_SHIFT, .field_pos = ID_AA64ISAR1_API_SHIFT,
.min_field_value = ID_AA64ISAR1_API_IMP_DEF, .min_field_value = ID_AA64ISAR1_API_IMP_DEF,
.matches = has_cpuid_feature, .matches = has_cpuid_feature,
},
{
.capability = ARM64_HAS_ADDRESS_AUTH,
.type = ARM64_CPUCAP_SYSTEM_FEATURE,
.matches = has_address_auth,
.cpu_enable = cpu_enable_address_auth, .cpu_enable = cpu_enable_address_auth,
}, },
{ {
@ -1506,11 +1502,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.min_field_value = ID_AA64ISAR1_GPI_IMP_DEF, .min_field_value = ID_AA64ISAR1_GPI_IMP_DEF,
.matches = has_cpuid_feature, .matches = has_cpuid_feature,
}, },
{
.capability = ARM64_HAS_GENERIC_AUTH,
.type = ARM64_CPUCAP_SYSTEM_FEATURE,
.matches = has_generic_auth,
},
#endif /* CONFIG_ARM64_PTR_AUTH */ #endif /* CONFIG_ARM64_PTR_AUTH */
{}, {},
}; };