wifi: mt76: move napi_enable() from under BH
mt76 does a lot of:
local_bh_disable();
napi_enable(...napi);
napi_schedule(...napi);
local_bh_enable();
local_bh_disable() is not a real lock, its most likely taken
because napi_schedule() requires that we invoke softirqs at
some point. napi_enable() needs to take a mutex, so move it
from under the BH protection.
Fixes: 413f0271f3
("net: protect NAPI enablement with netdev_lock()")
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/dcfd56bc-de32-4b11-9e19-d8bd1543745d@stanley.mountain
Reviewed-by: Eric Dumazet <edumazet@google.com>
Link: https://patch.msgid.link/20250124031841.1179756-8-kuba@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
parent
09a939487f
commit
a60558644e
12 changed files with 69 additions and 36 deletions
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@ -1479,14 +1479,13 @@ static void mt7603_mac_watchdog_reset(struct mt7603_dev *dev)
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tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
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mt7603_beacon_set_timer(dev, -1, beacon_int);
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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napi_schedule(&dev->mt76.tx_napi);
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napi_enable(&dev->mt76.napi[0]);
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napi_schedule(&dev->mt76.napi[0]);
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napi_enable(&dev->mt76.napi[1]);
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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napi_schedule(&dev->mt76.napi[0]);
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napi_schedule(&dev->mt76.napi[1]);
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local_bh_enable();
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@ -164,12 +164,16 @@ static int mt7615_pci_resume(struct pci_dev *pdev)
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dev_err(mdev->dev, "PDMA engine must be reinitialized\n");
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mt76_worker_enable(&mdev->tx_worker);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_enable(&mdev->napi[i]);
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napi_schedule(&mdev->napi[i]);
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}
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napi_enable(&mdev->tx_napi);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_schedule(&mdev->napi[i]);
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}
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napi_schedule(&mdev->tx_napi);
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local_bh_enable();
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@ -262,12 +262,14 @@ void mt7615_mac_reset_work(struct work_struct *work)
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mt76_worker_enable(&dev->mt76.tx_worker);
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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napi_schedule(&dev->mt76.tx_napi);
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_enable(&dev->mt76.napi[i]);
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}
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_schedule(&dev->mt76.napi[i]);
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}
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local_bh_enable();
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@ -282,14 +282,16 @@ static int mt76x0e_resume(struct pci_dev *pdev)
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mt76_worker_enable(&mdev->tx_worker);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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mt76_queue_rx_reset(dev, i);
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napi_enable(&mdev->napi[i]);
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}
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napi_enable(&mdev->tx_napi);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_schedule(&mdev->napi[i]);
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}
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napi_enable(&mdev->tx_napi);
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napi_schedule(&mdev->tx_napi);
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local_bh_enable();
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@ -504,12 +504,14 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev)
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mt76_worker_enable(&dev->mt76.tx_worker);
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tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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napi_schedule(&dev->mt76.tx_napi);
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_enable(&dev->mt76.napi[i]);
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}
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_schedule(&dev->mt76.napi[i]);
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}
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local_bh_enable();
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@ -151,12 +151,15 @@ mt76x2e_resume(struct pci_dev *pdev)
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mt76_worker_enable(&mdev->tx_worker);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_enable(&mdev->napi[i]);
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napi_schedule(&mdev->napi[i]);
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}
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napi_enable(&mdev->tx_napi);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_schedule(&mdev->napi[i]);
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}
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napi_schedule(&mdev->tx_napi);
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local_bh_enable();
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@ -1356,10 +1356,15 @@ mt7915_mac_restart(struct mt7915_dev *dev)
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mt7915_dma_reset(dev, true);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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if (mdev->q_rx[i].ndesc) {
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napi_enable(&dev->mt76.napi[i]);
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}
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}
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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if (mdev->q_rx[i].ndesc) {
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napi_schedule(&dev->mt76.napi[i]);
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}
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}
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@ -1419,8 +1424,9 @@ out:
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if (phy2)
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clear_bit(MT76_RESET, &phy2->mt76->state);
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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local_bh_enable();
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@ -1570,9 +1576,12 @@ void mt7915_mac_reset_work(struct work_struct *work)
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if (phy2)
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clear_bit(MT76_RESET, &phy2->mt76->state);
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local_bh_disable();
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_enable(&dev->mt76.napi[i]);
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}
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local_bh_disable();
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_schedule(&dev->mt76.napi[i]);
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}
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local_bh_enable();
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@ -1581,8 +1590,8 @@ void mt7915_mac_reset_work(struct work_struct *work)
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mt76_worker_enable(&dev->mt76.tx_worker);
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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local_bh_enable();
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@ -523,12 +523,15 @@ static int mt7921_pci_resume(struct device *device)
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mt76_worker_enable(&mdev->tx_worker);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_enable(&mdev->napi[i]);
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napi_schedule(&mdev->napi[i]);
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}
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napi_enable(&mdev->tx_napi);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_schedule(&mdev->napi[i]);
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}
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napi_schedule(&mdev->tx_napi);
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local_bh_enable();
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@ -81,9 +81,12 @@ int mt7921e_mac_reset(struct mt792x_dev *dev)
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mt792x_wpdma_reset(dev, true);
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local_bh_disable();
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_enable(&dev->mt76.napi[i]);
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}
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local_bh_disable();
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_schedule(&dev->mt76.napi[i]);
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}
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local_bh_enable();
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@ -115,8 +118,8 @@ int mt7921e_mac_reset(struct mt792x_dev *dev)
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err = __mt7921_start(&dev->phy);
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out:
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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local_bh_enable();
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@ -556,12 +556,15 @@ static int mt7925_pci_resume(struct device *device)
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mt76_worker_enable(&mdev->tx_worker);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_enable(&mdev->napi[i]);
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napi_schedule(&mdev->napi[i]);
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}
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napi_enable(&mdev->tx_napi);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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napi_schedule(&mdev->napi[i]);
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}
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napi_schedule(&mdev->tx_napi);
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local_bh_enable();
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@ -101,12 +101,15 @@ int mt7925e_mac_reset(struct mt792x_dev *dev)
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mt792x_wpdma_reset(dev, true);
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local_bh_disable();
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_enable(&dev->mt76.napi[i]);
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napi_schedule(&dev->mt76.napi[i]);
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}
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napi_enable(&dev->mt76.tx_napi);
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local_bh_disable();
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mt76_for_each_q_rx(&dev->mt76, i) {
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napi_schedule(&dev->mt76.napi[i]);
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}
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napi_schedule(&dev->mt76.tx_napi);
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local_bh_enable();
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@ -1695,7 +1695,6 @@ mt7996_mac_restart(struct mt7996_dev *dev)
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mt7996_dma_reset(dev, true);
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local_bh_disable();
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mt76_for_each_q_rx(mdev, i) {
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if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
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mt76_queue_is_wed_rro(&mdev->q_rx[i]))
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@ -1703,10 +1702,11 @@ mt7996_mac_restart(struct mt7996_dev *dev)
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if (mdev->q_rx[i].ndesc) {
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napi_enable(&dev->mt76.napi[i]);
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local_bh_disable();
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napi_schedule(&dev->mt76.napi[i]);
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local_bh_enable();
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}
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}
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local_bh_enable();
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clear_bit(MT76_MCU_RESET, &dev->mphy.state);
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clear_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
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@ -1764,8 +1764,8 @@ out:
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if (phy3)
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clear_bit(MT76_RESET, &phy3->mt76->state);
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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local_bh_enable();
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if (phy3)
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clear_bit(MT76_RESET, &phy3->mt76->state);
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local_bh_disable();
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mt76_for_each_q_rx(&dev->mt76, i) {
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if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
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mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
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continue;
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napi_enable(&dev->mt76.napi[i]);
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local_bh_disable();
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napi_schedule(&dev->mt76.napi[i]);
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local_bh_enable();
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}
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local_bh_enable();
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tasklet_schedule(&dev->mt76.irq_tasklet);
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mt76_worker_enable(&dev->mt76.tx_worker);
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local_bh_disable();
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napi_enable(&dev->mt76.tx_napi);
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local_bh_disable();
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napi_schedule(&dev->mt76.tx_napi);
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local_bh_enable();
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