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KVM: X86: Don't reset mmu context when toggling X86_CR4_PGE

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X86_CR4_PGE doesn't participate in kvm_mmu_role, so the mmu context
doesn't need to be reset.  It is only required to flush all the guest
tlb.

It is also inconsistent that X86_CR4_PGE is in KVM_MMU_CR4_ROLE_BITS
while kvm_mmu_role doesn't use X86_CR4_PGE.  So X86_CR4_PGE is also
removed from KVM_MMU_CR4_ROLE_BITS.

Signed-off-by: Lai Jiangshan <laijs@linux.alibaba.com>
Reviewed-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20210919024246.89230-3-jiangshanlai@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Lai Jiangshan 2021-09-19 10:42:46 +08:00 • committed by Paolo Bonzini
parent 552617382c
commit a91a7c7096
2 changed files with 4 additions and 4 deletions
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5
arch/x86/kvm/mmu.h
View file

@ -44,9 +44,8 @@
#define PT32_ROOT_LEVEL 2 #define PT32_ROOT_LEVEL 2
#define PT32E_ROOT_LEVEL 3 #define PT32E_ROOT_LEVEL 3
#define KVM_MMU_CR4_ROLE_BITS (X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | \ #define KVM_MMU_CR4_ROLE_BITS (X86_CR4_PSE | X86_CR4_PAE | X86_CR4_LA57 | \
X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE | \ X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE)
X86_CR4_LA57)
#define KVM_MMU_CR0_ROLE_BITS (X86_CR0_PG | X86_CR0_WP) #define KVM_MMU_CR0_ROLE_BITS (X86_CR0_PG | X86_CR0_WP)

3
arch/x86/kvm/x86.c
View file

@ -1024,7 +1024,8 @@ void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned lon
{ {
if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS) if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
kvm_mmu_reset_context(vcpu); kvm_mmu_reset_context(vcpu);
else if (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)) else if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
(!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu); kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
} }
EXPORT_SYMBOL_GPL(kvm_post_set_cr4); EXPORT_SYMBOL_GPL(kvm_post_set_cr4);