pinctrl: uniphier: support per-pin input enable for new SoCs
Upcoming new pinctrl drivers for PH1-LD11 and PH-LD20 support input signal gating for each pin. (While, existing ones only support it per pin-group.) This commit updates the core part for that. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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2 changed files with 14 additions and 11 deletions
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@ -433,22 +433,24 @@ static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev,
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{
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{
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
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unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data);
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unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data);
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unsigned int reg, mask;
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if (enable == 0) {
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/*
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/*
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* Multiple pins share one input enable, so per-pin disabling
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* Multiple pins share one input enable, per-pin disabling is
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* is impossible.
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* impossible.
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*/
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*/
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dev_err(pctldev->dev, "unable to disable input\n");
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if (!(priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) &&
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!enable)
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return -EINVAL;
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return -EINVAL;
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}
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/* UNIPHIER_PIN_IECTRL_NONE means the pin is always input-enabled */
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if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
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if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
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/* This pin is always input-enabled. nothing to do. */
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return enable ? 0 : -EINVAL;
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return 0;
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return regmap_update_bits(priv->regmap, UNIPHIER_PINCTRL_IECTRL,
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reg = UNIPHIER_PINCTRL_IECTRL + iectrl / 32 * 4;
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BIT(iectrl), BIT(iectrl));
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mask = BIT(iectrl % 32);
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return regmap_update_bits(priv->regmap, reg, mask, enable ? mask : 0);
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}
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}
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static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev,
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static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev,
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@ -166,6 +166,7 @@ struct uniphier_pinctrl_socdata {
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const struct uniphier_pinmux_function *functions;
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const struct uniphier_pinmux_function *functions;
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int functions_count;
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int functions_count;
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unsigned int caps;
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unsigned int caps;
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#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1)
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#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0)
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#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0)
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};
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};
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