drm/tests: Add HDMI TDMS character rate tests
The previous patch added an helper to compute the TMDS character rate on an HDMI connector. Let's add a few tests to make sure it works as expected. Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20240527-kms-hdmi-connector-state-v15-10-c5af16c3aae2@kernel.org Signed-off-by: Maxime Ripard <mripard@kernel.org>
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1 changed files with 300 additions and 0 deletions
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@ -8,7 +8,11 @@
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#include <drm/drm_atomic_state_helper.h>
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#include <drm/drm_atomic_state_helper.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_connector.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_kunit_helpers.h>
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#include <drm/drm_kunit_helpers.h>
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#include <drm/drm_modes.h>
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#include <drm/display/drm_hdmi_helper.h>
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#include <kunit/test.h>
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#include <kunit/test.h>
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@ -621,10 +625,306 @@ static struct kunit_suite drm_hdmi_connector_get_output_format_name_test_suite =
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.test_cases = drm_hdmi_connector_get_output_format_name_tests,
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.test_cases = drm_hdmi_connector_get_output_format_name_tests,
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};
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};
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/*
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* Test that for a given mode, with 8bpc and an RGB output the TMDS
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* character rate is equal to the mode pixel clock.
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*/
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static void drm_test_drm_hdmi_compute_mode_clock_rgb(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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unsigned long long rate;
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struct drm_device *drm = &priv->drm;
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mode = drm_display_mode_from_cea_vic(drm, 16);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 8, HDMI_COLORSPACE_RGB);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 1000ULL, rate);
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}
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/*
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* Test that for a given mode, with 10bpc and an RGB output the TMDS
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* character rate is equal to 1.25 times the mode pixel clock.
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*/
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static void drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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unsigned long long rate;
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struct drm_device *drm = &priv->drm;
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mode = drm_display_mode_from_cea_vic(drm, 16);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 10, HDMI_COLORSPACE_RGB);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 1250, rate);
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}
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/*
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* Test that for the VIC-1 mode, with 10bpc and an RGB output the TMDS
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* character rate computation fails.
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*/
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static void drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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unsigned long long rate;
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struct drm_device *drm = &priv->drm;
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mode = drm_display_mode_from_cea_vic(drm, 1);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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rate = drm_hdmi_compute_mode_clock(mode, 10, HDMI_COLORSPACE_RGB);
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KUNIT_EXPECT_EQ(test, rate, 0);
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}
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/*
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* Test that for a given mode, with 12bpc and an RGB output the TMDS
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* character rate is equal to 1.5 times the mode pixel clock.
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*/
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static void drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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unsigned long long rate;
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struct drm_device *drm = &priv->drm;
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mode = drm_display_mode_from_cea_vic(drm, 16);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 12, HDMI_COLORSPACE_RGB);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 1500, rate);
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}
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/*
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* Test that for the VIC-1 mode, with 12bpc and an RGB output the TMDS
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* character rate computation fails.
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*/
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static void drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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unsigned long long rate;
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struct drm_device *drm = &priv->drm;
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mode = drm_display_mode_from_cea_vic(drm, 1);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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rate = drm_hdmi_compute_mode_clock(mode, 12, HDMI_COLORSPACE_RGB);
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KUNIT_EXPECT_EQ(test, rate, 0);
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}
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/*
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* Test that for a mode with the pixel repetition flag, the TMDS
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* character rate is indeed double the mode pixel clock.
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*/
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static void drm_test_drm_hdmi_compute_mode_clock_rgb_double(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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unsigned long long rate;
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struct drm_device *drm = &priv->drm;
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mode = drm_display_mode_from_cea_vic(drm, 6);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_TRUE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 8, HDMI_COLORSPACE_RGB);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, (mode->clock * 1000ULL) * 2, rate);
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}
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/*
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* Test that the TMDS character rate computation for the VIC modes
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* explicitly listed in the spec as supporting YUV420 succeed and return
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* half the mode pixel clock.
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*/
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static void drm_test_connector_hdmi_compute_mode_clock_yuv420_valid(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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struct drm_device *drm = &priv->drm;
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unsigned long long rate;
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unsigned int vic = *(unsigned int *)test->param_value;
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mode = drm_display_mode_from_cea_vic(drm, vic);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 8, HDMI_COLORSPACE_YUV420);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, (mode->clock * 1000ULL) / 2, rate);
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}
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static const unsigned int drm_hdmi_compute_mode_clock_yuv420_vic_valid_tests[] = {
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96, 97, 101, 102, 106, 107,
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};
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static void drm_hdmi_compute_mode_clock_yuv420_vic_desc(const unsigned int *vic, char *desc)
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{
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sprintf(desc, "VIC %u", *vic);
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}
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KUNIT_ARRAY_PARAM(drm_hdmi_compute_mode_clock_yuv420_valid,
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drm_hdmi_compute_mode_clock_yuv420_vic_valid_tests,
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drm_hdmi_compute_mode_clock_yuv420_vic_desc);
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/*
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* Test that for a given mode listed supporting it and an YUV420 output
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* with 10bpc, the TMDS character rate is equal to 0.625 times the mode
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* pixel clock.
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*/
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static void drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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struct drm_device *drm = &priv->drm;
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unsigned int vic =
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drm_hdmi_compute_mode_clock_yuv420_vic_valid_tests[0];
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unsigned long long rate;
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mode = drm_display_mode_from_cea_vic(drm, vic);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 10, HDMI_COLORSPACE_YUV420);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 625, rate);
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}
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/*
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* Test that for a given mode listed supporting it and an YUV420 output
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* with 12bpc, the TMDS character rate is equal to 0.75 times the mode
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* pixel clock.
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*/
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static void drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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struct drm_device *drm = &priv->drm;
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unsigned int vic =
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drm_hdmi_compute_mode_clock_yuv420_vic_valid_tests[0];
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unsigned long long rate;
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mode = drm_display_mode_from_cea_vic(drm, vic);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 12, HDMI_COLORSPACE_YUV420);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 750, rate);
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}
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/*
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* Test that for a given mode, the computation of the TMDS character
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* rate with 8bpc and a YUV422 output succeeds and returns a rate equal
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* to the mode pixel clock.
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*/
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static void drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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struct drm_device *drm = &priv->drm;
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unsigned long long rate;
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mode = drm_display_mode_from_cea_vic(drm, 16);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 8, HDMI_COLORSPACE_YUV422);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 1000, rate);
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}
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/*
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* Test that for a given mode, the computation of the TMDS character
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* rate with 10bpc and a YUV422 output succeeds and returns a rate equal
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* to the mode pixel clock.
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*/
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static void drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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struct drm_device *drm = &priv->drm;
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unsigned long long rate;
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mode = drm_display_mode_from_cea_vic(drm, 16);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 10, HDMI_COLORSPACE_YUV422);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 1000, rate);
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}
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/*
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* Test that for a given mode, the computation of the TMDS character
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* rate with 12bpc and a YUV422 output succeeds and returns a rate equal
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* to the mode pixel clock.
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*/
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static void drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc(struct kunit *test)
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{
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struct drm_connector_init_priv *priv = test->priv;
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const struct drm_display_mode *mode;
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struct drm_device *drm = &priv->drm;
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unsigned long long rate;
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mode = drm_display_mode_from_cea_vic(drm, 16);
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KUNIT_ASSERT_NOT_NULL(test, mode);
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KUNIT_ASSERT_FALSE(test, mode->flags & DRM_MODE_FLAG_DBLCLK);
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rate = drm_hdmi_compute_mode_clock(mode, 12, HDMI_COLORSPACE_YUV422);
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KUNIT_ASSERT_GT(test, rate, 0);
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KUNIT_EXPECT_EQ(test, mode->clock * 1000, rate);
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}
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static struct kunit_case drm_hdmi_compute_mode_clock_tests[] = {
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KUNIT_CASE(drm_test_drm_hdmi_compute_mode_clock_rgb),
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KUNIT_CASE(drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc),
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KUNIT_CASE(drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1),
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KUNIT_CASE(drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc),
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KUNIT_CASE(drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1),
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KUNIT_CASE(drm_test_drm_hdmi_compute_mode_clock_rgb_double),
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KUNIT_CASE_PARAM(drm_test_connector_hdmi_compute_mode_clock_yuv420_valid,
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drm_hdmi_compute_mode_clock_yuv420_valid_gen_params),
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KUNIT_CASE(drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc),
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KUNIT_CASE(drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc),
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KUNIT_CASE(drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc),
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KUNIT_CASE(drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc),
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KUNIT_CASE(drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc),
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{ }
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};
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static struct kunit_suite drm_hdmi_compute_mode_clock_test_suite = {
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.name = "drm_test_connector_hdmi_compute_mode_clock",
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.init = drm_test_connector_init,
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.test_cases = drm_hdmi_compute_mode_clock_tests,
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};
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kunit_test_suites(
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kunit_test_suites(
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&drmm_connector_hdmi_init_test_suite,
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&drmm_connector_hdmi_init_test_suite,
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&drmm_connector_init_test_suite,
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&drmm_connector_init_test_suite,
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&drm_get_tv_mode_from_name_test_suite,
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&drm_get_tv_mode_from_name_test_suite,
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&drm_hdmi_compute_mode_clock_test_suite,
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&drm_hdmi_connector_get_output_format_name_test_suite
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&drm_hdmi_connector_get_output_format_name_test_suite
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);
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);
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