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mfd: exynos-lpass: Remove pad retention control

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Pad retention should be controlled from pin control driver, so remove it
from Exynos LPASS driver. After this change, no more access to PMU regmap
is needed, so remove also the code for handling PMU regmap.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
Marek Szyprowski 2017-03-23 09:03:24 +01:00 • committed by Lee Jones
parent 0e34d5de96
commit addebf1588
3 changed files with 0 additions and 21 deletions
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2
Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
View file

@ -5,7 +5,6 @@ Required properties:
- compatible : "samsung,exynos5433-lpass" - compatible : "samsung,exynos5433-lpass"
- reg : should contain the LPASS top SFR region location - reg : should contain the LPASS top SFR region location
and size and size
- samsung,pmu-syscon : the phandle to the Power Management Unit node
- #address-cells : should be 1 - #address-cells : should be 1
- #size-cells : should be 1 - #size-cells : should be 1
- ranges : must be present - ranges : must be present
@ -25,7 +24,6 @@ Example:
audio-subsystem { audio-subsystem {
compatible = "samsung,exynos5433-lpass"; compatible = "samsung,exynos5433-lpass";
reg = <0x11400000 0x100>, <0x11500000 0x08>; reg = <0x11400000 0x100>, <0x11500000 0x08>;
samsung,pmu-syscon = <&pmu_system_controller>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;

16
drivers/mfd/exynos-lpass.c
View file

@ -51,8 +51,6 @@
#define LPASS_INTR_SFR BIT(0) #define LPASS_INTR_SFR BIT(0)
struct exynos_lpass { struct exynos_lpass {
/* pointer to the Power Management Unit regmap */
struct regmap *pmu;
/* pointer to the LPASS TOP regmap */ /* pointer to the LPASS TOP regmap */
struct regmap *top; struct regmap *top;
}; };
@ -81,10 +79,6 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S); LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
/* Activate related PADs from retention state */
regmap_write(lpass->pmu, EXYNOS5433_PAD_RETENTION_AUD_OPTION,
EXYNOS_WAKEUP_FROM_LOWPWR);
exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET); exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET); exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET); exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
@ -95,9 +89,6 @@ static void exynos_lpass_disable(struct exynos_lpass *lpass)
/* Mask any unmasked IP interrupt sources */ /* Mask any unmasked IP interrupt sources */
regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, 0); regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, 0);
regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, 0); regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, 0);
/* Deactivate related PADs from retention state */
regmap_write(lpass->pmu, EXYNOS5433_PAD_RETENTION_AUD_OPTION, 0);
} }
static const struct regmap_config exynos_lpass_reg_conf = { static const struct regmap_config exynos_lpass_reg_conf = {
@ -131,13 +122,6 @@ static int exynos_lpass_probe(struct platform_device *pdev)
return PTR_ERR(lpass->top); return PTR_ERR(lpass->top);
} }
lpass->pmu = syscon_regmap_lookup_by_phandle(dev->of_node,
"samsung,pmu-syscon");
if (IS_ERR(lpass->pmu)) {
dev_err(dev, "Failed to lookup PMU regmap\n");
return PTR_ERR(lpass->pmu);
}
platform_set_drvdata(pdev, lpass); platform_set_drvdata(pdev, lpass);
exynos_lpass_enable(lpass); exynos_lpass_enable(lpass);

3
include/linux/mfd/syscon/exynos5-pmu.h
View file

@ -46,7 +46,4 @@
#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1)
#define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) #define EXYNOS5_MIPI_PHY_M_RESETN BIT(2)
#define EXYNOS5433_PAD_RETENTION_AUD_OPTION (0x3028)
#define EXYNOS5433_PAD_INITIATE_WAKEUP_FROM_LOWPWR BIT(28)
#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ #endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */