RISC-V: Add FP register ptrace support for gdb.
Add a variable and a macro to describe FP registers, assuming only D is supported. FP code is conditional on CONFIG_FPU. The FP regs and FCSR are copied separately to avoid copying struct padding. Tested by hand and with the gdb testsuite. Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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2 changed files with 55 additions and 0 deletions
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@ -19,7 +19,10 @@ typedef unsigned long elf_greg_t;
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typedef struct user_regs_struct elf_gregset_t;
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typedef struct user_regs_struct elf_gregset_t;
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#define ELF_NGREG (sizeof(elf_gregset_t) / sizeof(elf_greg_t))
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#define ELF_NGREG (sizeof(elf_gregset_t) / sizeof(elf_greg_t))
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/* We don't support f without d, or q. */
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typedef __u64 elf_fpreg_t;
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typedef union __riscv_fp_state elf_fpregset_t;
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typedef union __riscv_fp_state elf_fpregset_t;
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#define ELF_NFPREG (sizeof(struct __riscv_d_ext_state) / sizeof(elf_fpreg_t))
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#if __riscv_xlen == 64
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#if __riscv_xlen == 64
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#define ELF_RISCV_R_SYM(r_info) ELF64_R_SYM(r_info)
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#define ELF_RISCV_R_SYM(r_info) ELF64_R_SYM(r_info)
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@ -28,6 +28,9 @@
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enum riscv_regset {
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enum riscv_regset {
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REGSET_X,
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REGSET_X,
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#ifdef CONFIG_FPU
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REGSET_F,
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#endif
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};
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};
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static int riscv_gpr_get(struct task_struct *target,
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static int riscv_gpr_get(struct task_struct *target,
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@ -54,6 +57,45 @@ static int riscv_gpr_set(struct task_struct *target,
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return ret;
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return ret;
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}
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}
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#ifdef CONFIG_FPU
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static int riscv_fpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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int ret;
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struct __riscv_d_ext_state *fstate = &target->thread.fstate;
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, fstate, 0,
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offsetof(struct __riscv_d_ext_state, fcsr));
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if (!ret) {
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, fstate, 0,
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offsetof(struct __riscv_d_ext_state, fcsr) +
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sizeof(fstate->fcsr));
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}
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return ret;
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}
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static int riscv_fpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct __riscv_d_ext_state *fstate = &target->thread.fstate;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, fstate, 0,
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offsetof(struct __riscv_d_ext_state, fcsr));
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if (!ret) {
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, fstate, 0,
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offsetof(struct __riscv_d_ext_state, fcsr) +
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sizeof(fstate->fcsr));
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}
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return ret;
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}
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#endif
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static const struct user_regset riscv_user_regset[] = {
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static const struct user_regset riscv_user_regset[] = {
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[REGSET_X] = {
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[REGSET_X] = {
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@ -64,6 +106,16 @@ static const struct user_regset riscv_user_regset[] = {
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.get = &riscv_gpr_get,
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.get = &riscv_gpr_get,
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.set = &riscv_gpr_set,
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.set = &riscv_gpr_set,
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},
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},
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#ifdef CONFIG_FPU
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[REGSET_F] = {
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.core_note_type = NT_PRFPREG,
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.n = ELF_NFPREG,
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.size = sizeof(elf_fpreg_t),
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.align = sizeof(elf_fpreg_t),
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.get = &riscv_fpr_get,
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.set = &riscv_fpr_set,
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},
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#endif
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};
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};
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static const struct user_regset_view riscv_user_native_view = {
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static const struct user_regset_view riscv_user_native_view = {
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