soundwire: Add support for multi link bank switch
In cases of multiple Masters in a stream, synchronization between multiple Master(s) is achieved by performing bank switch together and using Master methods. Add sdw_ml_bank_switch() to wait for completion of bank switch. Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com> Signed-off-by: Shreyas NC <shreyas.nc@intel.com> Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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parent
48949722ce
commit
ce6e74d008
4 changed files with 144 additions and 12 deletions
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@ -35,6 +35,11 @@ int sdw_add_bus_master(struct sdw_bus *bus)
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INIT_LIST_HEAD(&bus->slaves);
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INIT_LIST_HEAD(&bus->slaves);
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INIT_LIST_HEAD(&bus->m_rt_list);
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INIT_LIST_HEAD(&bus->m_rt_list);
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/*
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* Initialize multi_link flag
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* TODO: populate this flag by reading property from FW node
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*/
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bus->multi_link = false;
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if (bus->ops->read_prop) {
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if (bus->ops->read_prop) {
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ret = bus->ops->read_prop(bus);
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ret = bus->ops->read_prop(bus);
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if (ret < 0) {
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if (ret < 0) {
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@ -4,6 +4,8 @@
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#ifndef __SDW_BUS_H
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#ifndef __SDW_BUS_H
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#define __SDW_BUS_H
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#define __SDW_BUS_H
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#define DEFAULT_BANK_SWITCH_TIMEOUT 3000
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#if IS_ENABLED(CONFIG_ACPI)
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#if IS_ENABLED(CONFIG_ACPI)
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int sdw_acpi_find_slaves(struct sdw_bus *bus);
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int sdw_acpi_find_slaves(struct sdw_bus *bus);
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#else
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#else
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@ -626,9 +626,10 @@ static int sdw_program_params(struct sdw_bus *bus)
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return ret;
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return ret;
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}
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}
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static int sdw_bank_switch(struct sdw_bus *bus)
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static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
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{
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{
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int col_index, row_index;
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int col_index, row_index;
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bool multi_link;
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struct sdw_msg *wr_msg;
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struct sdw_msg *wr_msg;
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u8 *wbuf = NULL;
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u8 *wbuf = NULL;
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int ret = 0;
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int ret = 0;
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@ -638,6 +639,8 @@ static int sdw_bank_switch(struct sdw_bus *bus)
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if (!wr_msg)
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if (!wr_msg)
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return -ENOMEM;
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return -ENOMEM;
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bus->defer_msg.msg = wr_msg;
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wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
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wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
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if (!wbuf) {
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if (!wbuf) {
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ret = -ENOMEM;
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ret = -ENOMEM;
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@ -658,17 +661,29 @@ static int sdw_bank_switch(struct sdw_bus *bus)
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SDW_MSG_FLAG_WRITE, wbuf);
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SDW_MSG_FLAG_WRITE, wbuf);
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wr_msg->ssp_sync = true;
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wr_msg->ssp_sync = true;
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ret = sdw_transfer(bus, wr_msg);
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/*
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* Set the multi_link flag only when both the hardware supports
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* and there is a stream handled by multiple masters
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*/
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multi_link = bus->multi_link && (m_rt_count > 1);
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if (multi_link)
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ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
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else
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ret = sdw_transfer(bus, wr_msg);
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if (ret < 0) {
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if (ret < 0) {
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dev_err(bus->dev, "Slave frame_ctrl reg write failed");
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dev_err(bus->dev, "Slave frame_ctrl reg write failed");
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goto error;
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goto error;
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}
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}
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kfree(wr_msg);
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if (!multi_link) {
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kfree(wbuf);
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kfree(wr_msg);
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bus->defer_msg.msg = NULL;
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kfree(wbuf);
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bus->params.curr_bank = !bus->params.curr_bank;
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bus->defer_msg.msg = NULL;
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bus->params.next_bank = !bus->params.next_bank;
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bus->params.curr_bank = !bus->params.curr_bank;
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bus->params.next_bank = !bus->params.next_bank;
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}
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return 0;
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return 0;
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@ -679,36 +694,87 @@ error_1:
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return ret;
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return ret;
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}
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}
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/**
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* sdw_ml_sync_bank_switch: Multilink register bank switch
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*
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* @bus: SDW bus instance
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*
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* Caller function should free the buffers on error
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*/
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static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
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{
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unsigned long time_left;
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if (!bus->multi_link)
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return 0;
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/* Wait for completion of transfer */
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time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
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bus->bank_switch_timeout);
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if (!time_left) {
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dev_err(bus->dev, "Controller Timed out on bank switch");
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return -ETIMEDOUT;
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}
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bus->params.curr_bank = !bus->params.curr_bank;
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bus->params.next_bank = !bus->params.next_bank;
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if (bus->defer_msg.msg) {
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kfree(bus->defer_msg.msg->buf);
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kfree(bus->defer_msg.msg);
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}
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return 0;
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}
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static int do_bank_switch(struct sdw_stream_runtime *stream)
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static int do_bank_switch(struct sdw_stream_runtime *stream)
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{
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{
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struct sdw_master_runtime *m_rt = NULL;
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struct sdw_master_runtime *m_rt = NULL;
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const struct sdw_master_ops *ops;
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const struct sdw_master_ops *ops;
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struct sdw_bus *bus = NULL;
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struct sdw_bus *bus = NULL;
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bool multi_link = false;
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int ret = 0;
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int ret = 0;
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list_for_each_entry(m_rt, &stream->master_list, stream_node) {
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list_for_each_entry(m_rt, &stream->master_list, stream_node) {
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bus = m_rt->bus;
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bus = m_rt->bus;
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ops = bus->ops;
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ops = bus->ops;
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if (bus->multi_link) {
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multi_link = true;
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mutex_lock(&bus->msg_lock);
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}
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/* Pre-bank switch */
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/* Pre-bank switch */
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if (ops->pre_bank_switch) {
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if (ops->pre_bank_switch) {
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ret = ops->pre_bank_switch(bus);
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ret = ops->pre_bank_switch(bus);
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if (ret < 0) {
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if (ret < 0) {
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dev_err(bus->dev,
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dev_err(bus->dev,
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"Pre bank switch op failed: %d", ret);
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"Pre bank switch op failed: %d", ret);
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return ret;
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goto msg_unlock;
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}
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}
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}
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}
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/* Bank switch */
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/*
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ret = sdw_bank_switch(bus);
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* Perform Bank switch operation.
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* For multi link cases, the actual bank switch is
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* synchronized across all Masters and happens later as a
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* part of post_bank_switch ops.
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*/
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ret = sdw_bank_switch(bus, stream->m_rt_count);
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if (ret < 0) {
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if (ret < 0) {
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dev_err(bus->dev, "Bank switch failed: %d", ret);
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dev_err(bus->dev, "Bank switch failed: %d", ret);
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return ret;
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goto error;
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}
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}
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}
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}
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/*
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* For multi link cases, it is expected that the bank switch is
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* triggered by the post_bank_switch for the first Master in the list
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* and for the other Masters the post_bank_switch() should return doing
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* nothing.
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*/
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list_for_each_entry(m_rt, &stream->master_list, stream_node) {
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list_for_each_entry(m_rt, &stream->master_list, stream_node) {
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bus = m_rt->bus;
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bus = m_rt->bus;
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ops = bus->ops;
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ops = bus->ops;
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@ -719,7 +785,47 @@ static int do_bank_switch(struct sdw_stream_runtime *stream)
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if (ret < 0) {
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if (ret < 0) {
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dev_err(bus->dev,
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dev_err(bus->dev,
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"Post bank switch op failed: %d", ret);
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"Post bank switch op failed: %d", ret);
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goto error;
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}
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}
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} else if (bus->multi_link && stream->m_rt_count > 1) {
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dev_err(bus->dev,
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"Post bank switch ops not implemented");
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goto error;
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}
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/* Set the bank switch timeout to default, if not set */
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if (!bus->bank_switch_timeout)
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bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
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/* Check if bank switch was successful */
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ret = sdw_ml_sync_bank_switch(bus);
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if (ret < 0) {
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dev_err(bus->dev,
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"multi link bank switch failed: %d", ret);
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goto error;
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}
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mutex_unlock(&bus->msg_lock);
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}
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return ret;
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error:
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list_for_each_entry(m_rt, &stream->master_list, stream_node) {
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bus = m_rt->bus;
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kfree(bus->defer_msg.msg->buf);
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kfree(bus->defer_msg.msg);
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}
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msg_unlock:
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if (multi_link) {
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list_for_each_entry(m_rt, &stream->master_list, stream_node) {
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bus = m_rt->bus;
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if (mutex_is_locked(&bus->msg_lock))
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mutex_unlock(&bus->msg_lock);
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}
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}
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}
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}
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@ -964,6 +1070,7 @@ int sdw_stream_remove_master(struct sdw_bus *bus,
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sdw_master_port_release(bus, m_rt);
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sdw_master_port_release(bus, m_rt);
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sdw_release_master_stream(m_rt, stream);
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sdw_release_master_stream(m_rt, stream);
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stream->m_rt_count--;
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}
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}
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if (list_empty(&stream->master_list))
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if (list_empty(&stream->master_list))
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@ -1150,6 +1257,18 @@ int sdw_stream_add_master(struct sdw_bus *bus,
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mutex_lock(&bus->bus_lock);
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mutex_lock(&bus->bus_lock);
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/*
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* For multi link streams, add the second master only if
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* the bus supports it.
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* Check if bus->multi_link is set
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*/
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if (!bus->multi_link && stream->m_rt_count > 0) {
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dev_err(bus->dev,
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"Multilink not supported, link %d", bus->link_id);
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ret = -EINVAL;
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goto unlock;
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}
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m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
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m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
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if (!m_rt) {
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if (!m_rt) {
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dev_err(bus->dev,
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dev_err(bus->dev,
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@ -1167,6 +1286,8 @@ int sdw_stream_add_master(struct sdw_bus *bus,
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if (ret)
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if (ret)
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goto stream_error;
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goto stream_error;
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stream->m_rt_count++;
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goto unlock;
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goto unlock;
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stream_error:
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stream_error:
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@ -678,6 +678,9 @@ struct sdw_master_ops {
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* @defer_msg: Defer message
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* @defer_msg: Defer message
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* @clk_stop_timeout: Clock stop timeout computed
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* @clk_stop_timeout: Clock stop timeout computed
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* @bank_switch_timeout: Bank switch timeout computed
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* @bank_switch_timeout: Bank switch timeout computed
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* @multi_link: Store bus property that indicates if multi links
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* are supported. This flag is populated by drivers after reading
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* appropriate firmware (ACPI/DT).
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*/
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*/
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struct sdw_bus {
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struct sdw_bus {
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struct device *dev;
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struct device *dev;
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@ -694,6 +697,7 @@ struct sdw_bus {
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struct sdw_defer defer_msg;
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struct sdw_defer defer_msg;
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unsigned int clk_stop_timeout;
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unsigned int clk_stop_timeout;
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u32 bank_switch_timeout;
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u32 bank_switch_timeout;
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bool multi_link;
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};
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};
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int sdw_add_bus_master(struct sdw_bus *bus);
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int sdw_add_bus_master(struct sdw_bus *bus);
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