PCI: mvebu: Fix macro names and comments about legacy interrupts
Register 0x1910 unmasks interrupts and legacy INTx interrupts are unmasked because driver does not support individual masking yet. Link: https://lore.kernel.org/r/20220222155030.988-11-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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1 changed files with 18 additions and 8 deletions
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@ -54,9 +54,10 @@
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PCIE_CONF_ADDR_EN)
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PCIE_CONF_ADDR_EN)
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#define PCIE_CONF_DATA_OFF 0x18fc
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#define PCIE_CONF_DATA_OFF 0x18fc
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#define PCIE_INT_CAUSE_OFF 0x1900
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#define PCIE_INT_CAUSE_OFF 0x1900
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#define PCIE_INT_UNMASK_OFF 0x1910
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#define PCIE_INT_INTX(i) BIT(24+i)
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#define PCIE_INT_PM_PME BIT(28)
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#define PCIE_INT_PM_PME BIT(28)
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#define PCIE_MASK_OFF 0x1910
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#define PCIE_INT_ALL_MASK GENMASK(31, 0)
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#define PCIE_MASK_ENABLE_INTS 0x0f000000
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#define PCIE_CTRL_OFF 0x1a00
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#define PCIE_CTRL_OFF 0x1a00
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#define PCIE_CTRL_X1_MODE 0x0001
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#define PCIE_CTRL_X1_MODE 0x0001
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#define PCIE_CTRL_RC_MODE BIT(1)
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#define PCIE_CTRL_RC_MODE BIT(1)
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@ -235,7 +236,7 @@ static void mvebu_pcie_setup_wins(struct mvebu_pcie_port *port)
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static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
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static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
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{
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{
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u32 ctrl, lnkcap, cmd, dev_rev, mask;
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u32 ctrl, lnkcap, cmd, dev_rev, unmask;
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/* Setup PCIe controller to Root Complex mode. */
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/* Setup PCIe controller to Root Complex mode. */
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ctrl = mvebu_readl(port, PCIE_CTRL_OFF);
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ctrl = mvebu_readl(port, PCIE_CTRL_OFF);
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@ -288,10 +289,19 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
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/* Point PCIe unit MBUS decode windows to DRAM space. */
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/* Point PCIe unit MBUS decode windows to DRAM space. */
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mvebu_pcie_setup_wins(port);
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mvebu_pcie_setup_wins(port);
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/* Enable interrupt lines A-D. */
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/*
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mask = mvebu_readl(port, PCIE_MASK_OFF);
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* Unmask all legacy INTx interrupts as driver does not provide a way
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mask |= PCIE_MASK_ENABLE_INTS;
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* for masking and unmasking of individual legacy INTx interrupts.
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mvebu_writel(port, mask, PCIE_MASK_OFF);
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* Legacy INTx are reported via one shared GIC source and therefore
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* kernel cannot distinguish which individual legacy INTx was triggered.
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* These interrupts are shared, so it should not cause any issue. Just
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* performance penalty as every PCIe interrupt handler needs to be
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* called when some interrupt is triggered.
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*/
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unmask = mvebu_readl(port, PCIE_INT_UNMASK_OFF);
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unmask |= PCIE_INT_INTX(0) | PCIE_INT_INTX(1) |
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PCIE_INT_INTX(2) | PCIE_INT_INTX(3);
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mvebu_writel(port, unmask, PCIE_INT_UNMASK_OFF);
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}
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}
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static struct mvebu_pcie_port *mvebu_pcie_find_port(struct mvebu_pcie *pcie,
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static struct mvebu_pcie_port *mvebu_pcie_find_port(struct mvebu_pcie *pcie,
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@ -1450,7 +1460,7 @@ static int mvebu_pcie_remove(struct platform_device *pdev)
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mvebu_writel(port, cmd, PCIE_CMD_OFF);
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mvebu_writel(port, cmd, PCIE_CMD_OFF);
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/* Mask all interrupt sources. */
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/* Mask all interrupt sources. */
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mvebu_writel(port, 0, PCIE_MASK_OFF);
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mvebu_writel(port, ~PCIE_INT_ALL_MASK, PCIE_INT_UNMASK_OFF);
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/* Free config space for emulated root bridge. */
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/* Free config space for emulated root bridge. */
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pci_bridge_emul_cleanup(&port->bridge);
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pci_bridge_emul_cleanup(&port->bridge);
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